[PATCH v9 00/12] KVM: x86/pmu: Add hardware Topdown metrics support

From: Zide Chen

Date: Fri Sep 18 2026 - 15:52:23 EST


Previous revisions were missing two things that are now addressed:

- A previous comment incorrectly claimed that MSR_PERF_METRICS bits
[63:32] are ignored on hardware that only implements level-1 metrics;
patch 10/12 fixes this by rejecting such writes.

- Patch 11/12 adds support for RDPMC Metrics Clear Mode. Without
this feature, for user programs using RDPMC directly, the counter
has to be reset explicitly using ioctl:

ioctl(perf_fd, PERF_EVENT_IOC_RESET, 0);

Tests: besides the tests mentioned on v8 cover letter, tested RDPMC
Metrics Clear on a DMR machine, and tested Topdown metrics on nested
setup on top of the vPMU support series [1].

perf tool misidentifies "cpu/slots,metrics_clear=1/" as not being the
slots event, so it inserts an additional slots event into the group;
event scheduling then fails because the group needs fixed counter 3
(SLOTS) twice:

$ perf stat -e "{cpu/slots,metrics_clear=1/,cpu/topdown-retiring/}" -- sleep 1
WARNING: events were regrouped to match PMUs
<not counted> slots
<not supported> cpu/slots,metrics_clear=1/
<not counted> cpu/topdown-retiring/

A fix for this perf tool bug is posted at [2].

New patches:
patch 8/12: Add INTEL_TD_METRIC_FIELD_BITS for code cleanup.
patch 9/12: perf/x86: Expose number of Topdown metric events to KVM.
patch 10/12: Reject writes to reserved MSR_PERF_METRICS bits.
patch 11/12: Support RDPMC Metrics Clear Mode.

Minor non-logical changes to existing patches:
patch 5/12: Remove the incorrect comment about writing to PERF_METRICS.
patch 7/12: Remove references to Metrics Clear from the changelog.

Patch 11/12 could be folded into patch 5/12, but I kept them separate
because patches 1-8 were already well reviewed, and keeping them
unchanged should make reviewing v9 easier.

Rebased to kvm-x86/next: 70c944caf570fda2d79baa71435589a8db39f048

v8: https://lore.kernel.org/kvm/20260817183143.226156-1-zide.chen@xxxxxxxxx/
QEMU: https://lore.kernel.org/qemu-devel/20260604025546.19378-7-zide.chen@xxxxxxxxx/

[1] https://lore.kernel.org/kvm/20260827223755.143247-1-zide.chen@xxxxxxxxx/
[2] https://lore.kernel.org/linux-perf-users/20260917182525.3DE801F000FF@xxxxxxxxxxxxxxx/T/#t

Dapeng Mi (2):
KVM: x86/pmu: Support Intel fixed counter 3 on mediated vPMU
KVM: x86/pmu: Support PERF_METRICS MSR in mediated vPMU

Mingwei Zhang (1):
KVM: x86/pmu: Snapshot host IA32_PERF_CAPABILITIES in kvm_host

Zide Chen (9):
KVM: x86/pmu: Do not map fixed counters >= 3 to generic perf events
KVM: x86/pmu: Rename and move vcpu_get_perf_capabilities() to pmu.h
KVM: x86/pmu: Move RDPMC emulation into per-vendor callbacks
KVM: x86/pmu: Emulate RDPMC on performance metrics
KVM: selftests: Add PERF_METRICS and fixed counter 3 tests
perf/x86: Add INTEL_TD_METRIC_FIELD_{BITS,MASK} constants
perf/x86: Expose number of Topdown metric events to KVM
KVM: x86/pmu: Reject writes to reserved MSR_PERF_METRICS bits
KVM: x86/pmu: Support RDPMC Metrics Clear Mode

arch/x86/events/core.c | 1 +
arch/x86/events/intel/core.c | 8 +-
arch/x86/include/asm/kvm-x86-pmu-ops.h | 2 +-
arch/x86/include/asm/kvm_host.h | 5 +-
arch/x86/include/asm/msr-index.h | 2 +
arch/x86/include/asm/perf_event.h | 5 +
arch/x86/kvm/msrs.c | 10 +-
arch/x86/kvm/pmu.c | 37 +++--
arch/x86/kvm/pmu.h | 17 ++-
arch/x86/kvm/svm/pmu.c | 13 +-
arch/x86/kvm/vmx/nested.c | 2 +
arch/x86/kvm/vmx/pmu_intel.c | 132 +++++++++++++++---
arch/x86/kvm/vmx/pmu_intel.h | 12 +-
arch/x86/kvm/vmx/vmx.c | 19 ++-
arch/x86/kvm/x86.c | 4 +
tools/arch/x86/include/asm/msr-index.h | 1 +
tools/testing/selftests/kvm/include/x86/pmu.h | 3 +
.../selftests/kvm/x86/pmu_counters_test.c | 97 ++++++++++++-
18 files changed, 303 insertions(+), 67 deletions(-)

--
2.55.0