[PATCH v9 12/12] KVM: x86/pmu: Support RDPMC Metrics Clear Mode

[Zide Chen]

Add PERF_CAP_RDPMC_METRICS_CLEAR (IA32_PERF_CAPABILITIES bit 19)
support. When set, and IA32_FIXED_CTR_CTRL.METRICS_CLEAR_EN (bit 14)
is also set, RDPMC of PERF_METRICS clears both PERF_METRICS and fixed
counter 3 (SLOTS) after the read.

Advertise the capability to guests only when the mediated PMU is
enabled and the host reports it. Unmask FIXED_CTR_CTRL bit 14 in
intel_pmu_refresh(), scoped to fixed counter 3 only via
intel_fixed_bits_by_idx().

For the mediated PMU, METRICS_CLEAR_EN takes effect natively via
passthrough. But kvm_need_rdpmc_intercept() can still force
interception for unrelated reasons, so intel_emulate_rdpmc() also
replicates the clear-on-read behavior for consistency.

Signed-off-by: Zide Chen <zide.chen@xxxxxxxxx>
---
v9: new patch.
---
 arch/x86/include/asm/msr-index.h |  1 +
 arch/x86/kvm/vmx/pmu_intel.c     | 28 ++++++++++++++++++++++++++++
 arch/x86/kvm/vmx/vmx.c           |  6 +++++-
 3 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 8fad944197fb..5851edcdda05 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -333,6 +333,7 @@
 #define PERF_CAP_PEBS_BASELINE		BIT_ULL(14)
 #define PERF_CAP_PERF_METRICS		BIT_ULL(15)
 #define PERF_CAP_PEBS_TIMING_INFO	BIT_ULL(17)
+#define PERF_CAP_RDPMC_METRICS_CLEAR	BIT_ULL(19)
 #define PERF_CAP_PEBS_MASK		(PERF_CAP_PEBS_TRAP | PERF_CAP_ARCH_REG | \
 					 PERF_CAP_PEBS_FORMAT | PERF_CAP_PEBS_BASELINE | \
 					 PERF_CAP_PEBS_TIMING_INFO)
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 98e2fb80347a..3e5e8bae67ab 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -36,6 +36,9 @@
 #define INTEL_RDPMC_TYPE_MASK	GENMASK(31, 16)
 #define INTEL_RDPMC_INDEX_MASK	GENMASK(15, 0)
 
+/* Index of the SLOTS fixed counter relative to the first fixed counter. */
+#define INTEL_FIXED_SLOTS_IDX	(INTEL_PMC_IDX_FIXED_SLOTS - INTEL_PMC_IDX_FIXED)
+
 #define MSR_PMC_FULL_WIDTH_BIT      (MSR_IA32_PMC0 - MSR_IA32_PERFCTR0)
 
 static struct lbr_desc *vcpu_to_lbr_desc(struct kvm_vcpu *vcpu)
@@ -86,6 +89,14 @@ static void reprogram_fixed_counters(struct kvm_pmu *pmu, u64 data)
 	}
 }
 
+static bool intel_pmu_metrics_clear_enabled(struct kvm_pmu *pmu)
+{
+	u8 fixed_ctr_ctrl = fixed_ctrl_field(pmu->fixed_ctr_ctrl,
+					     INTEL_FIXED_SLOTS_IDX);
+
+	return fixed_ctr_ctrl & INTEL_FIXED_3_METRICS_CLEAR;
+}
+
 static int intel_emulate_rdpmc(struct kvm_vcpu *vcpu, unsigned int idx,
 			       u64 *data)
 {
@@ -138,6 +149,18 @@ static int intel_emulate_rdpmc(struct kvm_vcpu *vcpu, unsigned int idx,
 			return 1;
 
 		*data = pmu->perf_metrics;
+
+		/*
+		 * Per the SDM, RDPMC of PERF_METRICS clears both PERF_METRICS
+		 * and the SLOTS fixed counter when Metrics Clear Mode is
+		 * enabled via INTEL_FIXED_3_METRICS_CLEAR in FIXED_CTR_CTRL.
+		 */
+		pmc = kvm_pmc_idx_to_pmc(pmu, INTEL_PMC_IDX_FIXED_SLOTS);
+		if (pmc && intel_pmu_metrics_clear_enabled(pmu)) {
+			pmu->perf_metrics = 0;
+			pmc_write_counter(pmc, 0);
+		}
+
 		return 0;
 	default:
 		return 1;
@@ -601,6 +624,11 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
 						 INTEL_FIXED_0_USER |
 						 INTEL_FIXED_0_ENABLE_PMI);
 
+	if (perf_capabilities & PERF_CAP_RDPMC_METRICS_CLEAR)
+		pmu->fixed_ctr_ctrl_rsvd &=
+			~intel_fixed_bits_by_idx(INTEL_FIXED_SLOTS_IDX,
+						 INTEL_FIXED_3_METRICS_CLEAR);
+
 	counter_rsvd = ~((BIT_ULL(pmu->nr_arch_gp_counters) - 1) |
 			 ((BIT_ULL(pmu->nr_arch_fixed_counters) - 1) << KVM_FIXED_PMC_BASE_IDX));
 	pmu->global_ctrl_rsvd = counter_rsvd;
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 372de66365ab..df02372c70e3 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -2616,6 +2616,9 @@ int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 			if (!cpuid_model_is_consistent(vcpu))
 				return 1;
 		}
+		if ((data & PERF_CAP_RDPMC_METRICS_CLEAR) &&
+		    !(data & PERF_CAP_PERF_METRICS))
+			return 1;
 		ret = kvm_set_msr_common(vcpu, msr_info);
 		break;
 
@@ -7999,7 +8002,8 @@ static __init u64 vmx_get_perf_capabilities(void)
 	}
 
 	if (enable_mediated_pmu)
-		perf_cap |= kvm_host.perf_capabilities & PERF_CAP_PERF_METRICS;
+		perf_cap |= kvm_host.perf_capabilities &
+			    (PERF_CAP_PERF_METRICS | PERF_CAP_RDPMC_METRICS_CLEAR);
 
 	return perf_cap;
 }
-- 
2.55.0