Re:Re: [PATCH v8 00/18] Ambarella CV75 SoC minimal bring-up

[zl020895]

Thanks, Bart. 

Please queue the GPIO patches yourself and provide an immutable
branch for the SoC tree.

The GPIO part is:
  gpiolib: regmap: add write_data_after_dir quirk
  gpiolib: regmap: add gpio_regmap_get_chip()
  gpio: pl061: convert register access to regmap
  gpio: pl061: use IRQ_TYPE_LEVEL_MASK and IRQ_TYPE_EDGE_BOTH
  gpio: pl061: use cleanup helpers for locks
  gpio: pl061: switch data path to gpio-regmap
  gpio: pl061: add Ambarella register-layout variant

I will send a follow-up for gpio_regmap_get_chip() with the missing
kernel-doc. The rest of the series (clk, pinctrl, UART, DT) can stay
with the SoC tree once that GPIO branch is available.

Best regards,
Long Zhao

At 2026-09-21 18:31:45, "Bartosz Golaszewski" <brgl@xxxxxxxxxx> wrote:
>On Mon, 21 Sep 2026 06:23:19 +0200, Long Zhao via B4 Relay
><devnull+longzhao.ambarella.com@xxxxxxxxxx> said:
>> This series adds minimal Ambarella CV75 support for early bring-up with
>> a serial console: DT bindings, RCT clocks, pinctrl, PL061 GPIO via
>> gpio-regmap, 8250_dw UART quirks, ARCH_AMBARELLA, CV75 EVK DT, and
>> MAINTAINERS.
>>
>> This is a single unified series. Please apply via the SoC
>> tree; subsystem maintainers are Cc'd for their pieces.
>>
>
>As I said before: this brings in a lot of potentially conflicting code into
>drivers/gpio/ so I'll need an immutable branch to pull or I can queue the GPIO
>part myself and provide an immutable branch to other trees.
>
>Bartosz