[tip: perf/urgent] perf/x86/intel: Rename DMR offcore_rsp attribute to offmodule_rsp

From: tip-bot2 for Dapeng Mi

Date: Tue Sep 22 2026 - 05:52:15 EST


The following commit has been merged into the perf/urgent branch of tip:

Commit-ID: 0102c8c7fdfc4bd700971daff2b94470f4eafae4
Gitweb: https://git.kernel.org/tip/0102c8c7fdfc4bd700971daff2b94470f4eafae4
Author: Dapeng Mi <dapeng1.mi@xxxxxxxxxxxxxxx>
AuthorDate: Thu, 17 Sep 2026 09:52:33 +08:00
Committer: Ingo Molnar <mingo@xxxxxxxxxx>
CommitterDate: Tue, 22 Sep 2026 11:37:46 +02:00

perf/x86/intel: Rename DMR offcore_rsp attribute to offmodule_rsp

DMR introduces Offmodule Response events in place of the legacy
Offcore Response events, but it still exposes the inherited
offcore_rsp PMU attribute for programming the corresponding MSR data.

Rename the DMR PMU attribute to offmodule_rsp so the sysfs interface
matches the underlying event name and avoids user & tooling confusion.

Signed-off-by: Dapeng Mi <dapeng1.mi@xxxxxxxxxxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>
Link: https://patch.msgid.link/20260917015234.981153-12-dapeng1.mi@xxxxxxxxxxxxxxx
---
arch/x86/events/intel/core.c | 23 ++++++++++++++++++++---
1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 2271560..3843dbe 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -6601,6 +6601,8 @@ static void intel_pmu_filter(struct pmu *pmu, int cpu, bool *ret)

PMU_FORMAT_ATTR(offcore_rsp, "config1:0-63");

+PMU_FORMAT_ATTR(offmodule_rsp, "config1:0-63");
+
PMU_FORMAT_ATTR(ldlat, "config1:0-15");

PMU_FORMAT_ATTR(frontend, "config1:0-23");
@@ -6649,6 +6651,20 @@ static struct attribute *skl_format_attr[] = {
NULL,
};

+static struct attribute *pnc_format_attr_rtm[] = {
+ &format_attr_in_tx.attr,
+ &format_attr_in_tx_cp.attr,
+ &format_attr_offmodule_rsp.attr,
+ &format_attr_ldlat.attr,
+ NULL
+};
+
+static struct attribute *pnc_format_attr[] = {
+ &format_attr_offmodule_rsp.attr,
+ &format_attr_ldlat.attr,
+ NULL
+};
+
static __initconst const struct x86_pmu core_pmu = {
.name = "core",
.handle_irq = x86_pmu_handle_irq,
@@ -8589,6 +8605,8 @@ __init int intel_pmu_init(void)
case INTEL_DIAMONDRAPIDS_X:
intel_pmu_init_pnc(NULL);
x86_pmu.pebs_latency_data = pnc_latency_data;
+ extra_attr = boot_cpu_has(X86_FEATURE_RTM) ?
+ pnc_format_attr_rtm : pnc_format_attr;

pr_cont("Panthercove events, ");
name = "panthercove";
@@ -8597,13 +8615,12 @@ __init int intel_pmu_init(void)
glc_common:
intel_pmu_init_glc(NULL);
intel_pmu_pebs_data_source_skl(true);
-
+ extra_attr = boot_cpu_has(X86_FEATURE_RTM) ?
+ hsw_format_attr : nhm_format_attr;
glc_base:
x86_pmu.pebs_ept = 1;
x86_pmu.hw_config = hsw_hw_config;
x86_pmu.get_event_constraints = glc_get_event_constraints;
- extra_attr = boot_cpu_has(X86_FEATURE_RTM) ?
- hsw_format_attr : nhm_format_attr;
extra_skl_attr = skl_format_attr;
mem_attr = glc_events_attrs;
td_attr = glc_td_events_attrs;