[PATCH 4/4] arm64: dts: qcom: glymur: Add CoreSight nodes for APSS debug block
From: Jie Gan
Date: Tue Sep 22 2026 - 06:39:00 EST
The APSS debug block is built with CoreSight devices like ETM,
replicator, funnel and TMC ETF. Add dt nodes for these devices to
enable ETM trace.
The replicator, funnel and TMC ETF nodes in this block are physically
powered by the CPU cluster power rail rather than by a dedicated
always-on rail. Add a power-domains property referencing the
corresponding cluster_pdN domain to each of these nodes, so their
power state is tied to the CPU cluster domain and the runtime PM core
can power the domain on before the devices are accessed and let it be
powered off otherwise.
Mahua is based on glymur but only has 12 CPUs across two clusters
instead of 18 across three, so delete the ETM and cluster2 CoreSight
nodes that have no corresponding CPUs on that platform.
Signed-off-by: Jie Gan <jie.gan@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/glymur.dtsi | 1184 ++++++++++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/mahua.dtsi | 16 +
2 files changed, 1200 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
index de7c395d9c35..049bebbb80f9 100644
--- a/arch/arm64/boot/dts/qcom/glymur.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
@@ -397,6 +397,312 @@ eud_in: endpoint {
};
};
+ etm-0 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu0>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint = <&ncc0_0_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm-1 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu1>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint = <&ncc0_1_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm-2 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu2>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint = <&ncc0_2_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm-3 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu3>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint = <&ncc0_3_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm-4 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu4>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm4_out: endpoint {
+ remote-endpoint = <&ncc0_4_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm-5 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu5>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm5_out: endpoint {
+ remote-endpoint = <&ncc0_5_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm-6 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu6>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm6_out: endpoint {
+ remote-endpoint = <&ncc1_0_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm-7 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu7>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm7_out: endpoint {
+ remote-endpoint = <&ncc1_1_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm-8 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu8>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm8_out: endpoint {
+ remote-endpoint = <&ncc1_2_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm-9 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu9>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm9_out: endpoint {
+ remote-endpoint = <&ncc1_3_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm-10 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu10>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm10_out: endpoint {
+ remote-endpoint = <&ncc1_4_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm-11 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu11>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm11_out: endpoint {
+ remote-endpoint = <&ncc1_5_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm12: etm-12 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu12>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm12_out: endpoint {
+ remote-endpoint = <&ncc2_0_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm13: etm-13 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu13>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm13_out: endpoint {
+ remote-endpoint = <&ncc2_1_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm14: etm-14 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu14>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm14_out: endpoint {
+ remote-endpoint = <&ncc2_2_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm15: etm-15 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu15>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm15_out: endpoint {
+ remote-endpoint = <&ncc2_3_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm16: etm-16 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu16>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm16_out: endpoint {
+ remote-endpoint = <&ncc2_4_rep_in>;
+ };
+ };
+ };
+ };
+
+ etm17: etm-17 {
+ compatible = "arm,coresight-etm4x-sysreg";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ cpu = <&cpu17>;
+ qcom,skip-power-up;
+
+ out-ports {
+ port {
+ etm17_out: endpoint {
+ remote-endpoint = <&ncc2_5_rep_in>;
+ };
+ };
+ };
+ };
+
firmware {
scm: scm {
compatible = "qcom,scm-glymur", "qcom,scm";
@@ -7244,6 +7550,14 @@ tn_ag_in53: endpoint {
};
};
+ port@36 {
+ reg = <0x36>;
+
+ tn_ag_in54: endpoint {
+ remote-endpoint = <&apss_funnel_out>;
+ };
+ };
+
port@3f {
reg = <0x3f>;
@@ -7625,6 +7939,51 @@ pcie_rscc_tpda_out: endpoint {
};
};
+ funnel@12080000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x0 0x12080000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ apss_funnel_in0: endpoint {
+ remote-endpoint = <&ncc0_etf_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ apss_funnel_in1: endpoint {
+ remote-endpoint = <&ncc1_etf_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ apss_funnel_in2: endpoint {
+ remote-endpoint = <&ncc2_etf_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ apss_funnel_out: endpoint {
+ remote-endpoint = <&tn_ag_in54>;
+ };
+ };
+ };
+ };
+
tpdm@11c03000 {
compatible = "qcom,coresight-tpdm", "arm,primecell";
reg = <0x0 0x11c03000 0x0 0x1000>;
@@ -8286,6 +8645,831 @@ rpmhpd_opp_turbo_l1: opp-416 {
};
};
+ funnel@1d021000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x0 0x1d021000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster0_pd>;
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@2 {
+ reg = <2>;
+
+ ncc0_2_funnel_in2: endpoint {
+ remote-endpoint = <&ncc0_1_funnel_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc0_2_funnel_out: endpoint {
+ remote-endpoint = <&ncc0_etf_in>;
+ };
+ };
+ };
+ };
+
+ tmc@1d029000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x0 0x1d029000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster0_pd>;
+
+ in-ports {
+ port {
+ ncc0_etf_in: endpoint {
+ remote-endpoint = <&ncc0_2_funnel_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc0_etf_out: endpoint {
+ remote-endpoint = <&apss_funnel_in0>;
+ };
+ };
+ };
+ };
+
+ funnel@1d081000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x0 0x1d081000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster0_pd>;
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ ncc0_1_funnel_in0: endpoint {
+ remote-endpoint = <&ncc0_0_rep_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ncc0_1_funnel_in1: endpoint {
+ remote-endpoint = <&ncc0_1_rep_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ ncc0_1_funnel_in2: endpoint {
+ remote-endpoint = <&ncc0_2_rep_out>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ ncc0_1_funnel_in3: endpoint {
+ remote-endpoint = <&ncc0_3_rep_out>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+
+ ncc0_1_funnel_in4: endpoint {
+ remote-endpoint = <&ncc0_4_rep_out>;
+ };
+ };
+
+ port@5 {
+ reg = <5>;
+
+ ncc0_1_funnel_in5: endpoint {
+ remote-endpoint = <&ncc0_5_rep_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc0_1_funnel_out: endpoint {
+ remote-endpoint = <&ncc0_2_funnel_in2>;
+ };
+ };
+ };
+ };
+
+ replicator@1d090000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d090000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster0_pd>;
+
+ in-ports {
+ port {
+ ncc0_0_rep_in: endpoint {
+ remote-endpoint = <&etm0_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc0_0_rep_out: endpoint {
+ remote-endpoint = <&ncc0_1_funnel_in0>;
+ };
+ };
+ };
+ };
+
+ replicator@1d0a0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d0a0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster0_pd>;
+
+ in-ports {
+ port {
+ ncc0_1_rep_in: endpoint {
+ remote-endpoint = <&etm1_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc0_1_rep_out: endpoint {
+ remote-endpoint = <&ncc0_1_funnel_in1>;
+ };
+ };
+ };
+ };
+
+ replicator@1d0b0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d0b0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster0_pd>;
+
+ in-ports {
+ port {
+ ncc0_2_rep_in: endpoint {
+ remote-endpoint = <&etm2_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc0_2_rep_out: endpoint {
+ remote-endpoint = <&ncc0_1_funnel_in2>;
+ };
+ };
+ };
+ };
+
+ replicator@1d0c0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d0c0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster0_pd>;
+
+ in-ports {
+ port {
+ ncc0_3_rep_in: endpoint {
+ remote-endpoint = <&etm3_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc0_3_rep_out: endpoint {
+ remote-endpoint = <&ncc0_1_funnel_in3>;
+ };
+ };
+ };
+ };
+
+ replicator@1d0d0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d0d0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster0_pd>;
+
+ in-ports {
+ port {
+ ncc0_4_rep_in: endpoint {
+ remote-endpoint = <&etm4_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc0_4_rep_out: endpoint {
+ remote-endpoint = <&ncc0_1_funnel_in4>;
+ };
+ };
+ };
+ };
+
+ replicator@1d0e0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d0e0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster0_pd>;
+
+ in-ports {
+ port {
+ ncc0_5_rep_in: endpoint {
+ remote-endpoint = <&etm5_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc0_5_rep_out: endpoint {
+ remote-endpoint = <&ncc0_1_funnel_in5>;
+ };
+ };
+ };
+ };
+
+ funnel@1d121000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x0 0x1d121000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster1_pd>;
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@2 {
+ reg = <2>;
+
+ ncc1_2_funnel_in2: endpoint {
+ remote-endpoint = <&ncc1_1_funnel_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc1_2_funnel_out: endpoint {
+ remote-endpoint = <&ncc1_etf_in>;
+ };
+ };
+ };
+ };
+
+ tmc@1d129000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x0 0x1d129000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster1_pd>;
+
+ in-ports {
+ port {
+ ncc1_etf_in: endpoint {
+ remote-endpoint = <&ncc1_2_funnel_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc1_etf_out: endpoint {
+ remote-endpoint = <&apss_funnel_in1>;
+ };
+ };
+ };
+ };
+
+ funnel@1d181000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x0 0x1d181000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster1_pd>;
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ ncc1_1_funnel_in0: endpoint {
+ remote-endpoint = <&ncc1_0_rep_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ncc1_1_funnel_in1: endpoint {
+ remote-endpoint = <&ncc1_1_rep_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ ncc1_1_funnel_in2: endpoint {
+ remote-endpoint = <&ncc1_2_rep_out>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ ncc1_1_funnel_in3: endpoint {
+ remote-endpoint = <&ncc1_3_rep_out>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+
+ ncc1_1_funnel_in4: endpoint {
+ remote-endpoint = <&ncc1_4_rep_out>;
+ };
+ };
+
+ port@5 {
+ reg = <5>;
+
+ ncc1_1_funnel_in5: endpoint {
+ remote-endpoint = <&ncc1_5_rep_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc1_1_funnel_out: endpoint {
+ remote-endpoint = <&ncc1_2_funnel_in2>;
+ };
+ };
+ };
+ };
+
+ replicator@1d190000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d190000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster1_pd>;
+
+ in-ports {
+ port {
+ ncc1_0_rep_in: endpoint {
+ remote-endpoint = <&etm6_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc1_0_rep_out: endpoint {
+ remote-endpoint = <&ncc1_1_funnel_in0>;
+ };
+ };
+ };
+ };
+
+ replicator@1d1a0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d1a0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster1_pd>;
+
+ in-ports {
+ port {
+ ncc1_1_rep_in: endpoint {
+ remote-endpoint = <&etm7_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc1_1_rep_out: endpoint {
+ remote-endpoint = <&ncc1_1_funnel_in1>;
+ };
+ };
+ };
+ };
+
+ replicator@1d1b0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d1b0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster1_pd>;
+
+ in-ports {
+ port {
+ ncc1_2_rep_in: endpoint {
+ remote-endpoint = <&etm8_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc1_2_rep_out: endpoint {
+ remote-endpoint = <&ncc1_1_funnel_in2>;
+ };
+ };
+ };
+ };
+
+ replicator@1d1c0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d1c0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster1_pd>;
+
+ in-ports {
+ port {
+ ncc1_3_rep_in: endpoint {
+ remote-endpoint = <&etm9_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc1_3_rep_out: endpoint {
+ remote-endpoint = <&ncc1_1_funnel_in3>;
+ };
+ };
+ };
+ };
+
+ replicator@1d1d0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d1d0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster1_pd>;
+
+ in-ports {
+ port {
+ ncc1_4_rep_in: endpoint {
+ remote-endpoint = <&etm10_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc1_4_rep_out: endpoint {
+ remote-endpoint = <&ncc1_1_funnel_in4>;
+ };
+ };
+ };
+ };
+
+ replicator@1d1e0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d1e0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster1_pd>;
+
+ in-ports {
+ port {
+ ncc1_5_rep_in: endpoint {
+ remote-endpoint = <&etm11_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc1_5_rep_out: endpoint {
+ remote-endpoint = <&ncc1_1_funnel_in5>;
+ };
+ };
+ };
+ };
+
+ cluster2_funnel_l2: funnel@1d221000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x0 0x1d221000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster2_pd>;
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@2 {
+ reg = <2>;
+
+ ncc2_2_funnel_in2: endpoint {
+ remote-endpoint = <&ncc2_1_funnel_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc2_2_funnel_out: endpoint {
+ remote-endpoint = <&ncc2_etf_in>;
+ };
+ };
+ };
+ };
+
+ cluster2_etf: tmc@1d229000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x0 0x1d229000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster2_pd>;
+
+ in-ports {
+ port {
+ ncc2_etf_in: endpoint {
+ remote-endpoint = <&ncc2_2_funnel_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc2_etf_out: endpoint {
+ remote-endpoint = <&apss_funnel_in2>;
+ };
+ };
+ };
+ };
+
+ cluster2_funnel_l1: funnel@1d281000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x0 0x1d281000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster2_pd>;
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ ncc2_1_funnel_in0: endpoint {
+ remote-endpoint = <&ncc2_0_rep_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ncc2_1_funnel_in1: endpoint {
+ remote-endpoint = <&ncc2_1_rep_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ ncc2_1_funnel_in2: endpoint {
+ remote-endpoint = <&ncc2_2_rep_out>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ ncc2_1_funnel_in3: endpoint {
+ remote-endpoint = <&ncc2_3_rep_out>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+
+ ncc2_1_funnel_in4: endpoint {
+ remote-endpoint = <&ncc2_4_rep_out>;
+ };
+ };
+
+ port@5 {
+ reg = <5>;
+
+ ncc2_1_funnel_in5: endpoint {
+ remote-endpoint = <&ncc2_5_rep_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc2_1_funnel_out: endpoint {
+ remote-endpoint = <&ncc2_2_funnel_in2>;
+ };
+ };
+ };
+ };
+
+ cluster2_rep_2_0: replicator@1d290000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d290000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster2_pd>;
+
+ in-ports {
+ port {
+ ncc2_0_rep_in: endpoint {
+ remote-endpoint = <&etm12_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc2_0_rep_out: endpoint {
+ remote-endpoint = <&ncc2_1_funnel_in0>;
+ };
+ };
+ };
+ };
+
+ cluster2_rep_2_1: replicator@1d2a0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d2a0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster2_pd>;
+
+ in-ports {
+ port {
+ ncc2_1_rep_in: endpoint {
+ remote-endpoint = <&etm13_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc2_1_rep_out: endpoint {
+ remote-endpoint = <&ncc2_1_funnel_in1>;
+ };
+ };
+ };
+ };
+
+ cluster2_rep_2_2: replicator@1d2b0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d2b0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster2_pd>;
+
+ in-ports {
+ port {
+ ncc2_2_rep_in: endpoint {
+ remote-endpoint = <&etm14_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc2_2_rep_out: endpoint {
+ remote-endpoint = <&ncc2_1_funnel_in2>;
+ };
+ };
+ };
+ };
+
+ cluster2_rep_2_3: replicator@1d2c0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d2c0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster2_pd>;
+
+ in-ports {
+ port {
+ ncc2_3_rep_in: endpoint {
+ remote-endpoint = <&etm15_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc2_3_rep_out: endpoint {
+ remote-endpoint = <&ncc2_1_funnel_in3>;
+ };
+ };
+ };
+ };
+
+ cluster2_rep_2_4: replicator@1d2d0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d2d0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster2_pd>;
+
+ in-ports {
+ port {
+ ncc2_4_rep_in: endpoint {
+ remote-endpoint = <&etm16_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc2_4_rep_out: endpoint {
+ remote-endpoint = <&ncc2_1_funnel_in4>;
+ };
+ };
+ };
+ };
+
+ cluster2_rep_2_5: replicator@1d2e0000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1d2e0000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ power-domains = <&cluster2_pd>;
+
+ in-ports {
+ port {
+ ncc2_5_rep_in: endpoint {
+ remote-endpoint = <&etm17_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ ncc2_5_rep_out: endpoint {
+ remote-endpoint = <&ncc2_1_funnel_in5>;
+ };
+ };
+ };
+ };
+
nsi_noc: interconnect@1d600000 {
compatible = "qcom,glymur-nsinoc";
reg = <0x0 0x1d600000 0x0 0x14080>;
diff --git a/arch/arm64/boot/dts/qcom/mahua.dtsi b/arch/arm64/boot/dts/qcom/mahua.dtsi
index a59c5ed7b48e..77a456fb0772 100644
--- a/arch/arm64/boot/dts/qcom/mahua.dtsi
+++ b/arch/arm64/boot/dts/qcom/mahua.dtsi
@@ -6,8 +6,18 @@
/* Mahua is heavily based on Glymur, with some meaningful differences */
#include "glymur.dtsi"
+/delete-node/ &apss_funnel_in2;
/delete-node/ &bwmon_cluster2;
+/delete-node/ &cluster2_etf;
+/delete-node/ &cluster2_funnel_l1;
+/delete-node/ &cluster2_funnel_l2;
/delete-node/ &cluster2_pd;
+/delete-node/ &cluster2_rep_2_0;
+/delete-node/ &cluster2_rep_2_1;
+/delete-node/ &cluster2_rep_2_2;
+/delete-node/ &cluster2_rep_2_3;
+/delete-node/ &cluster2_rep_2_4;
+/delete-node/ &cluster2_rep_2_5;
/delete-node/ &cpu_map_cluster2;
/delete-node/ &cpu12;
/delete-node/ &cpu13;
@@ -22,6 +32,12 @@
/delete-node/ &cpu_pd16;
/delete-node/ &cpu_pd17;
/delete-node/ &cti_wpss;
+/delete-node/ &etm12;
+/delete-node/ &etm13;
+/delete-node/ &etm14;
+/delete-node/ &etm15;
+/delete-node/ &etm16;
+/delete-node/ &etm17;
/delete-node/ &pcie3_phy;
/delete-node/ &pcie3a;
/delete-node/ &thermal_aoss_6;
--
2.34.1