Re: [PATCH v3 10/18] KVM: arm64: Handle PSCI calls for protected VMs at EL2

[Vincent Donnefort]

On Tue, Sep 22, 2026 at 05:35:09PM +0100, Vincent Donnefort wrote:
> On Mon, Sep 14, 2026 at 12:33:30PM +0100, Fuad Tabba wrote:
> > EL2 implements PSCI 1.1 for protected VMs: CPU_ON, CPU_OFF,
> > PSCI_VERSION and PSCI_FEATURES are decided at EL2 (CPU_ON and CPU_OFF
> > still exit to the host, which only schedules or parks the target),
> > AFFINITY_INFO, CPU_SUSPEND and the platform power operations are
> > forwarded to the host, and anything else returns NOT_SUPPORTED,
> > including the TRNG calls and the functions above 1.1, SYSTEM_OFF2
> > among them, that the host handled for a protected guest until now.
> > TRNG for protected guests is a follow-up. AFFINITY_INFO stays
> > with the host, which returns OFF only once it has parked the target:
> > the host is what a guest polls to see a CPU_OFF complete before it
> > issues the next CPU_ON, as Linux does on hotplug.
> > 
> > Three consequences follow:
> > 
> >   - A protected VM has one primary vCPU, the first whose hyp vCPU is
> >     created with mp_state RUNNABLE. A second one, or an mp_state other
> >     than RUNNABLE or STOPPED, fails that vCPU's first KVM_RUN with
> >     -EINVAL.
> > 
> >   - CPU_ON finds its target among the hyp vCPUs, which exist from the
> >     target's first KVM_RUN; before that the guest gets
> >     INVALID_PARAMETERS.
> > 
> >   - A vCPU EL2 holds powered off doesn't run: handle___kvm_vcpu_run()
> >     returns ARM_EXCEPTION_IL, reported as KVM_EXIT_FAIL_ENTRY. Its
> >     existing bail-outs return the same code instead of an -EINVAL that
> >     handle_exit() didn't recognise, for every hyp vCPU.
> > 
> > Non-protected VMs keep power_state ON and accept any mp_state.
> > 
> > Each protected vCPU is OFF, ON_PENDING or ON. CPU_ON moves the target
> > to ON_PENDING, and the target's next run resets it and moves it to ON.
> > The racing transitions are cmpxchg, and the reset state is published
> > with a release/acquire pair, documented at each site. CPU_OFF publishes
> > OFF with a release, so the target's clear of reset_state.reset is
> > ordered before it and a CPU_ON that then wins on OFF republishes after
> > the clear. Rolling a CPU_ON the host failed back to OFF needs the
> > host's return value, which the per-EC marshalling patch delivers along
> > with the rollback. Until then such a target stays ON_PENDING, and the
> > reset has no observable effect: flush_hyp_vcpu() copies the host's
> > context in on every entry until that patch removes the copy, so the
> > target enters on the host's values rather than the ones EL2 reset.
> > 
> > Signed-off-by: Fuad Tabba <fuad.tabba@xxxxxxxxx>
> > ---
> >  arch/arm64/kvm/hyp/include/nvhe/pkvm.h |  14 ++
> >  arch/arm64/kvm/hyp/nvhe/hyp-main.c     |  25 ++-
> >  arch/arm64/kvm/hyp/nvhe/pkvm.c         | 283 ++++++++++++++++++++++++-
> >  3 files changed, 311 insertions(+), 11 deletions(-)
> > 
> > diff --git a/arch/arm64/kvm/hyp/include/nvhe/pkvm.h b/arch/arm64/kvm/hyp/include/nvhe/pkvm.h
> > index a04b7c04d5135..63b368baf0e72 100644
> > --- a/arch/arm64/kvm/hyp/include/nvhe/pkvm.h
> > +++ b/arch/arm64/kvm/hyp/include/nvhe/pkvm.h
> > @@ -29,6 +29,12 @@ struct pkvm_hyp_vcpu {
> >  
> >  	/* The previous exit's ARM_EXCEPTION_* code. */
> >  	u32 exit_code;
> > +
> > +	/*
> > +	 * PSCI_0_2_AFFINITY_LEVEL_{OFF, ON_PENDING, ON}. A non-protected
> > +	 * vCPU is always ON.
> > +	 */
> > +	int power_state;
> >  };
> >  
> >  /*
> > @@ -46,6 +52,12 @@ struct pkvm_hyp_vm {
> >  	struct hyp_pool pool;
> >  	hyp_spinlock_t lock;
> >  
> > +	/*
> > +	 * The vCPU initialised RUNNABLE: claimed under vm_table_lock,
> > +	 * released only if its own init fails.
> > +	 */
> > +	struct pkvm_hyp_vcpu *primary_vcpu;
> > +
> >  	/* Array of the hyp vCPU structures for this VM. */
> >  	struct pkvm_hyp_vcpu *vcpus[];
> >  };
> > @@ -98,4 +110,6 @@ void kvm_init_pvm_id_regs(struct kvm_vcpu *vcpu);
> >  void kvm_reset_pvm_sys_regs(struct kvm_vcpu *vcpu);
> >  int kvm_check_pvm_sysreg_table(void);
> >  
> > +int pkvm_reset_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu);
> > +struct pkvm_hyp_vcpu *pkvm_mpidr_to_hyp_vcpu(struct pkvm_hyp_vm *vm, u64 mpidr);
> >  #endif /* __ARM64_KVM_NVHE_PKVM_H__ */
> > diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c
> > index 9cc8ef16897c1..da8ab636063cf 100644
> > --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c
> > +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c
> > @@ -8,6 +8,7 @@
> >  #include <hyp/switch.h>
> >  
> >  #include <linux/irqchip/arm-gic-v3.h>
> > +#include <uapi/linux/psci.h>
> >  
> >  #include <asm/pgtable-types.h>
> >  #include <asm/kvm_asm.h>
> > @@ -456,14 +457,12 @@ static void handle___kvm_vcpu_run(struct kvm_cpu_context *host_ctxt)
> >  {
> >  	struct pkvm_hyp_vcpu *hyp_vcpu;
> >  	struct kvm_vcpu *host_vcpu;
> > -	int ret;
> > +	int ret = ARM_EXCEPTION_IL;
> >  
> >  	host_vcpu = get_host_hyp_vcpus(host_ctxt, 1, &hyp_vcpu);
> >  
> > -	if (!host_vcpu) {
> > -		ret = -EINVAL;
> > +	if (!host_vcpu)
> >  		goto out;
> > -	}
> >  
> >  	if (unlikely(hyp_vcpu)) {
> >  		/*
> > @@ -472,8 +471,22 @@ static void handle___kvm_vcpu_run(struct kvm_cpu_context *host_ctxt)
> >  		 * loading a vcpu. Therefore, if SME features enabled the host
> >  		 * is misbehaving.
> >  		 */
> > -		if (unlikely(system_supports_sme() && read_sysreg_s(SYS_SVCR))) {
> > -			ret = -EINVAL;
> > +		if (unlikely(system_supports_sme() && read_sysreg_s(SYS_SVCR)))
> > +			goto out;
> > +
> > +		/*
> > +		 * ON has a single writer, pkvm_reset_vcpu() on this CPU, so
> > +		 * READ_ONCE suffices. ON_PENDING takes the reset; -ECANCELED
> > +		 * is a rollback that raced it.
> > +		 */
> > +		switch (READ_ONCE(hyp_vcpu->power_state)) {
> > +		case PSCI_0_2_AFFINITY_LEVEL_ON:
> > +			break;
> > +		case PSCI_0_2_AFFINITY_LEVEL_ON_PENDING:
> > +			if (pkvm_reset_vcpu(hyp_vcpu))
> > +				goto out;
> > +			break;
> > +		default:
> >  			goto out;
> >  		}
> >  
> > diff --git a/arch/arm64/kvm/hyp/nvhe/pkvm.c b/arch/arm64/kvm/hyp/nvhe/pkvm.c
> > index 855cb77c8bba1..d970cba12ca47 100644
> > --- a/arch/arm64/kvm/hyp/nvhe/pkvm.c
> > +++ b/arch/arm64/kvm/hyp/nvhe/pkvm.c
> > @@ -5,6 +5,7 @@
> >   */
> >  
> >  #include <kvm/arm_hypercalls.h>
> > +#include <kvm/arm_psci.h>
> >  
> >  #include <linux/kvm_host.h>
> >  #include <linux/mm.h>
> > @@ -433,6 +434,40 @@ static void pkvm_init_features_from_host(struct pkvm_hyp_vm *hyp_vm, const struc
> >  		   allowed_features, KVM_VCPU_MAX_FEATURES);
> >  }
> >  
> > +static int pkvm_vcpu_init_psci(struct pkvm_hyp_vcpu *hyp_vcpu, u32 mp_state)
> > +{
> > +	struct vcpu_reset_state *reset_state = &hyp_vcpu->vcpu.arch.reset_state;
> > +	struct pkvm_hyp_vm *hyp_vm = pkvm_hyp_vcpu_to_hyp_vm(hyp_vcpu);
> > +	struct kvm_vcpu *host_vcpu;
> > +
> > +	if (!pkvm_hyp_vcpu_is_protected(hyp_vcpu)) {
> > +		/* The host manages a non-protected vCPU: always ON at EL2. */
> > +		hyp_vcpu->power_state = PSCI_0_2_AFFINITY_LEVEL_ON;
> > +		return 0;
> > +	}
> > +
> > +	if (mp_state != KVM_MP_STATE_RUNNABLE && mp_state != KVM_MP_STATE_STOPPED)
> > +		return -EINVAL;
> > +
> > +	if (mp_state == KVM_MP_STATE_STOPPED) {
> > +		reset_state->reset = false;
> > +		hyp_vcpu->power_state = PSCI_0_2_AFFINITY_LEVEL_OFF;
> > +		return 0;
> > +	}
> > +
> > +	hyp_assert_lock_held(&vm_table_lock);
> > +	if (hyp_vm->primary_vcpu)
> > +		return -EINVAL;
> > +	hyp_vm->primary_vcpu = hyp_vcpu;
> > +
> > +	host_vcpu = hyp_vcpu->host_vcpu;
> > +	reset_state->pc = READ_ONCE(host_vcpu->arch.ctxt.regs.pc);
> > +	reset_state->r0 = READ_ONCE(host_vcpu->arch.ctxt.regs.regs[0]);
> > +	reset_state->reset = true;
> > +	hyp_vcpu->power_state = PSCI_0_2_AFFINITY_LEVEL_ON_PENDING;
> > +	return 0;
> > +}
> > +
> >  static void unpin_host_vcpu(struct kvm_vcpu *host_vcpu)
> >  {
> >  	if (host_vcpu)
> > @@ -447,6 +482,9 @@ static void unpin_host_sve_state(struct pkvm_hyp_vcpu *hyp_vcpu)
> >  		return;
> >  
> >  	sve_state = hyp_vcpu->vcpu.arch.sve_state;
> > +	if (!sve_state)
> > +		return;
> > +
> >  	hyp_unpin_shared_mem(sve_state,
> >  			     sve_state + vcpu_sve_state_size(&hyp_vcpu->vcpu));
> >  }
> > @@ -559,10 +597,12 @@ static int init_pkvm_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu,
> >  			      struct kvm_vcpu *host_vcpu)
> >  {
> >  	int ret = 0;
> > +	u32 mp_state;
> >  
> >  	if (hyp_pin_shared_mem(host_vcpu, host_vcpu + 1))
> >  		return -EBUSY;
> >  
> > +	mp_state = READ_ONCE(host_vcpu->arch.mp_state.mp_state);
> >  	hyp_vcpu->host_vcpu = host_vcpu;
> >  
> >  	hyp_vcpu->vcpu.kvm = &hyp_vm->kvm;
> > @@ -571,7 +611,6 @@ static int init_pkvm_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu,
> >  
> >  	hyp_vcpu->vcpu.arch.hw_mmu = &hyp_vm->kvm.arch.mmu;
> >  	hyp_vcpu->vcpu.arch.cflags = READ_ONCE(host_vcpu->arch.cflags);
> > -	hyp_vcpu->vcpu.arch.mp_state.mp_state = KVM_MP_STATE_STOPPED;
> >  
> >  	if (!pkvm_hyp_vcpu_is_protected(hyp_vcpu)) {
> >  		/*
> > @@ -601,9 +640,12 @@ static int init_pkvm_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu,
> >  
> >  	if (pkvm_hyp_vcpu_is_protected(hyp_vcpu))
> >  		kvm_reset_pvm_sys_regs(&hyp_vcpu->vcpu);
> > +	ret = pkvm_vcpu_init_psci(hyp_vcpu, mp_state);
> >  done:
> > -	if (ret)
> > +	if (ret) {
> >  		unpin_host_vcpu(host_vcpu);
> > +		unpin_host_sve_state(hyp_vcpu);
> > +	}
> 
> Was it planned for a different commit of the series?

Ha no it wasn't, you're calling unpin_host_sve_state() unconditionally. 

> 
> >  	return ret;
> >  }
> >

[...]