Re: [PATCH v4 1/4] KVM: TDX: Track configurable CPUID bits allowed by KVM

[Binbin Wu]

On 9/23/2026 8:01 AM, Edgecombe, Rick P wrote:
> On Thu, 2026-09-17 at 15:25 +0800, Binbin Wu wrote:
>>
>> Allow MWAIT, XTPR, and HT through TDX_CFG_EXTRA_F(), as these bits are
>> not advertised in kvm_cpu_caps[].  The remaining directly configurable
>> feature bits outside kvm_cpu_caps[] are left out of the allowlist:
>>
>>   - Features forced to zero when #VE is reduced,
>>
> 
> Sorry, I'm not following this logic exactly. The guest can control it's own view
> of CPUID. Why do we need to filter the host setting them via direct
> configuration, just because the guest can change it's view to exclude them?


These feature neither supported by the TDX module nor supported by the KVM.
If the guest enabled the #VE reduction, the access to the related MSRs will
cause #GP. If the guest doesn't enabled the #VE redcution, #VE cannot be
supported by KVM since the related MSRs are not support by KVM.

So the guest cannot use these features anyway.
> 
>>  or lacking KVM support
>>     for the associated MSRs: EST, TM2, SDBG, DCA, ACPI, ACC (TM), RDT_A,
>>     RDT_M, TME, PCONFIG, and CORE_CAPABILITIES.  Handle CORE_CAPABILITIES
>>     in a subsequent patch.
>>
>>   - Features tied to IA32_MISC_ENABLE bits that a TD cannot set when
>>     TDCS.TD_CTLS.REDUCE_VE is set: CID and PBE.
>>
>>   - Features that can clobber host state and lack KVM support for TDX:
>>     FRED.
> 
> I think we can't say this quite yet. The arch isn't finalized

Oh, right. I should be more rigorous.

> 
>>
>>   - Unsupported features: PREFETCHWT1 (Xeon Phi only), PSN (absent from
>>     TDX-capable CPUs), AMX-TRANSPOSE (never implemented on an Intel
>>     platform), and RAO_INT (defined only for future processors).
>>
>> Filtering KVM_TDX_CAPABILITIES in a subsequent patch will intentionally
> 
> Nit: "patch" -> "change"
> 
> This is drilled into my head working on the tip side. I'm not sure if Sean has
> the same allergy though.

Will update it.

> 
>> stop advertising the excluded bits as configurable, as the corresponding
>> features are unsupported or cannot be properly virtualized.
>>
>> Signed-off-by: Binbin Wu <binbin.wu@xxxxxxxxxxxxxxx>
> 
> Overall it looks very good to me.