[PATCH 1/5] PCI: dwc: Add RAS event counter field masks

[Manikanta Maddireddy]

Add complete bit masks for the DesignWare RAS-DES event counter
fields so consumers can use FIELD_PREP() and FIELD_MODIFY() without
open-coded shifts.

Keep the existing shift-based definitions for now so current users
keep building until their call sites are converted.

Signed-off-by: Manikanta Maddireddy <mmaddireddy@xxxxxxxxxx>
---
 drivers/pci/controller/dwc/pcie-designware.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 0735ae940924..c4db241547be 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -278,14 +278,17 @@
 #define EVENT_COUNTER_ALL_CLEAR		0x3
 #define EVENT_COUNTER_ENABLE_ALL	0x7
 #define EVENT_COUNTER_ENABLE_SHIFT	2
+#define EVENT_COUNTER_ENABLE_MASK	GENMASK(4, 2)
 #define EVENT_COUNTER_EVENT_SEL_MASK	GENMASK(7, 0)
 #define EVENT_COUNTER_EVENT_SEL_SHIFT	16
+#define EVENT_COUNTER_EVENT_SEL_FIELD_MASK	GENMASK(23, 16)
 #define EVENT_COUNTER_EVENT_Tx_L0S	0x2
 #define EVENT_COUNTER_EVENT_Rx_L0S	0x3
 #define EVENT_COUNTER_EVENT_L1		0x5
 #define EVENT_COUNTER_EVENT_L1_1	0x7
 #define EVENT_COUNTER_EVENT_L1_2	0x8
 #define EVENT_COUNTER_GROUP_SEL_SHIFT	24
+#define EVENT_COUNTER_GROUP_SEL_MASK	GENMASK(27, 24)
 #define EVENT_COUNTER_GROUP_5		0x5
 
 #define PCIE_RAS_DES_EVENT_COUNTER_DATA		0xc
-- 
2.34.1