RE: [PATCH v2 2/3] spi: spi-nxp-fspi: enter stop mode before reconfiguring MCR0 and DLL

[Bough Chen (OSS)]

NXP Confidential
> -----Original Message-----
> From: Michael Walle <michael@xxxxxxxx>
> Sent: Thursday, September 24, 2026 6:08 PM
> To: Bough Chen (OSS) <haibo.chen@xxxxxxxxxxx>; Han Xu
> <han.xu@xxxxxxx>; Yogesh Gaur <yogeshgaur.83@xxxxxxxxx>; Mark Brown
> <broonie@xxxxxxxxxx>
> Cc: linux-spi@xxxxxxxxxxxxxxx; imx@xxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; Bough Chen <haibo.chen@xxxxxxx>
> Subject: Re: [PATCH v2 2/3] spi: spi-nxp-fspi: enter stop mode before
> reconfiguring MCR0 and DLL
>
> On Tue Jul 28, 2026 at 12:18 PM CEST, haibo.chen wrote:
> > From: Haibo Chen <haibo.chen@xxxxxxx>
> >
> > In nxp_fspi_select_mem() the RX sample clock source (MCR0[RXCLKSRC])
> > and the DLL control registers (DLLxCR) are reconfigured while the
> > FlexSPI module is still enabled. According to the FlexSPI reference
> > manual initialization sequence, MCR0 and the DLL control registers
> > should be programmed while the module is in stop mode, i.e. with
> > MCR0[MDIS] set to 1, and the module re-enabled (MCR0[MDIS] = 0)
> > afterwards.
> >
> > Wrap the RX sample clock source selection and the DLL calibration/
> > override reconfiguration in a stop-mode window to align with the RM
> > and avoid reconfiguring timing-critical registers while the module is
> > active.
> >
> > Signed-off-by: Haibo Chen <haibo.chen@xxxxxxx>
>
> This will actually cause the following error on an i.MX 95 19x19 EVK
> (imx95-19x19-evk.dts):
>
>   nxp-fspi 425e0000.spi: DLL lock failed, please fix it!
>
> Any ideas what causes this? I'm running the latest linux-next kernel.

Hi Michael, thanks for report this issue.

I can reproduce this issue on my side also, will look into it. I'll get back to you if I find anything.

Regards
Haibo Chen
>
> -michael
>
> > ---
> >  drivers/spi/spi-nxp-fspi.c | 14 ++++++++++++++
> >  1 file changed, 14 insertions(+)
> >
> > diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
> > index
> >
> 6de6d432cdcb2ee383a02d72f20000045903e176..a426b8d92193a4e303f4
> 11cd17c1
> > 6cb31c3f3873 100644
> > --- a/drivers/spi/spi-nxp-fspi.c
> > +++ b/drivers/spi/spi-nxp-fspi.c
> > @@ -867,6 +867,7 @@ static void nxp_fspi_select_mem(struct nxp_fspi *f,
> struct spi_device *spi,
> >     unsigned long rate = op->max_freq;
> >     int ret;
> >     uint64_t size_kb;
> > +   u32 reg;
> >
> >     /*
> >      * Return when following condition all meet, @@ -896,6 +897,15 @@
> > static void nxp_fspi_select_mem(struct nxp_fspi *f, struct spi_device
> > *spi,
> >
> >     dev_dbg(f->dev, "Target device [CS:%x] selected\n",
> > spi_get_chipselect(spi, 0));
> >
> > +   /*
> > +    * Per the FlexSPI reference manual (initialization sequence), MCR0 and
> > +    * the DLL control registers should be configured while the module is in
> > +    * stop mode (MCR0[MDIS] = 1). Enter stop mode before
> reconfiguring the
> > +    * RX sample clock source and the DLL, then exit stop mode
> afterwards.
> > +    */
> > +   reg = fspi_readl(f, f->iobase + FSPI_MCR0);
> > +   fspi_writel(f, reg | FSPI_MCR0_MDIS, f->iobase + FSPI_MCR0);
> > +
> >     nxp_fspi_select_rx_sample_clk_source(f, op_is_dtr);
> >     rate = min(f->max_rate, op->max_freq);
> >
> > @@ -928,6 +938,10 @@ static void nxp_fspi_select_mem(struct nxp_fspi *f,
> struct spi_device *spi,
> >     else
> >             nxp_fspi_dll_override(f);
> >
> > +   /* Exit stop mode now that MCR0 and the DLL have been
> reconfigured. */
> > +   reg = fspi_readl(f, f->iobase + FSPI_MCR0);
> > +   fspi_writel(f, reg & ~FSPI_MCR0_MDIS, f->iobase + FSPI_MCR0);
> > +
> >     f->pre_op_rate = op->max_freq;
> >
> >     f->selected = spi_get_chipselect(spi, 0);