[PATCH v3 2/2] arm64: dts: qcom: nord: wire up GPI DMA for QUP I2C/SPI engines
From: Bartosz Golaszewski
Date: Thu Sep 24 2026 - 08:18:23 EST
Add DMA phandles to I2C and SPI QUPv3 serial engine nodes.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/nord.dtsi | 124 +++++++++++++++++++++++++++++++++++++
1 file changed, 124 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/nord.dtsi b/arch/arm64/boot/dts/qcom/nord.dtsi
index bc48238050ecc6efa342f68a568447be6f9068c0..0ce5db747919952bf0c785592b797f88793a3047 100644
--- a/arch/arm64/boot/dts/qcom/nord.dtsi
+++ b/arch/arm64/boot/dts/qcom/nord.dtsi
@@ -944,6 +944,10 @@ i2c14: i2c@880000 {
reg = <0x0 0x00880000 0x0 0x4000>;
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 0 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -971,6 +975,10 @@ i2c15: i2c@884000 {
reg = <0x0 0x00884000 0x0 0x4000>;
interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 1 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -998,6 +1006,10 @@ i2c16: i2c@888000 {
reg = <0x0 0x00888000 0x0 0x4000>;
interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 2 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1025,6 +1037,10 @@ i2c17: i2c@88c000 {
reg = <0x0 0x0088c000 0x0 0x4000>;
interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 3 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1052,6 +1068,10 @@ i2c18: i2c@890000 {
reg = <0x0 0x00890000 0x0 0x4000>;
interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 4 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1079,6 +1099,10 @@ i2c19: i2c@894000 {
reg = <0x0 0x00894000 0x0 0x4000>;
interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 5 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1106,6 +1130,10 @@ i2c20: i2c@898000 {
reg = <0x0 0x00898000 0x0 0x4000>;
interrupts = <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 6 QCOM_GPI_I2C>,
+ <&gpi_dma2 1 6 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1117,6 +1145,10 @@ spi20: spi@898000 {
reg = <0x0 0x00898000 0x0 0x4000>;
interrupts = <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma2 0 6 QCOM_GPI_SPI>,
+ <&gpi_dma2 1 6 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1163,6 +1195,10 @@ i2c0: i2c@980000 {
reg = <0x0 0x00980000 0x0 0x4000>;
interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 0 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1182,6 +1218,10 @@ uart0: serial@980000 {
reg = <0x0 0x00980000 0x0 0x4000>;
interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 0 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1190,6 +1230,10 @@ i2c1: i2c@984000 {
reg = <0x0 0x00984000 0x0 0x4000>;
interrupts = <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 1 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1209,6 +1253,10 @@ uart1: serial@984000 {
reg = <0x0 0x00984000 0x0 0x4000>;
interrupts = <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 1 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1217,6 +1265,10 @@ i2c2: i2c@988000 {
reg = <0x0 0x00988000 0x0 0x4000>;
interrupts = <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 2 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1236,6 +1288,10 @@ uart2: serial@988000 {
reg = <0x0 0x00988000 0x0 0x4000>;
interrupts = <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 2 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1244,6 +1300,10 @@ i2c3: i2c@98c000 {
reg = <0x0 0x0098c000 0x0 0x4000>;
interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 3 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1263,6 +1323,10 @@ uart3: serial@98c000 {
reg = <0x0 0x0098c000 0x0 0x4000>;
interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 3 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1271,6 +1335,10 @@ i2c4: i2c@990000 {
reg = <0x0 0x00990000 0x0 0x4000>;
interrupts = <GIC_SPI 516 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 4 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1298,6 +1366,10 @@ i2c5: i2c@994000 {
reg = <0x0 0x00994000 0x0 0x4000>;
interrupts = <GIC_SPI 517 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
+ <&gpi_dma0 1 5 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1309,6 +1381,10 @@ spi5: spi@994000 {
reg = <0x0 0x00994000 0x0 0x4000>;
interrupts = <GIC_SPI 517 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 5 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1355,6 +1431,10 @@ i2c7: i2c@a80000 {
reg = <0x0 0x00a80000 0x0 0x4000>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 0 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1374,6 +1454,10 @@ uart7: serial@a80000 {
reg = <0x0 0x00a80000 0x0 0x4000>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 0 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1382,6 +1466,10 @@ i2c8: i2c@a84000 {
reg = <0x0 0x00a84000 0x0 0x4000>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 1 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1401,6 +1489,10 @@ uart8: serial@a84000 {
reg = <0x0 0x00a84000 0x0 0x4000>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 1 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1409,6 +1501,10 @@ i2c9: i2c@a88000 {
reg = <0x0 0x00a88000 0x0 0x4000>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 2 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1428,6 +1524,10 @@ i2c10: i2c@a8c000 {
reg = <0x0 0x00a8c000 0x0 0x4000>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 3 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1447,6 +1547,10 @@ i2c11: i2c@a90000 {
reg = <0x0 0x00a90000 0x0 0x4000>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 4 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1466,6 +1570,10 @@ uart11: serial@a90000 {
reg = <0x0 0x00a90000 0x0 0x4000>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 4 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1474,6 +1582,10 @@ i2c12: i2c@a94000 {
reg = <0x0 0x00a94000 0x0 0x4000>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 5 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1493,6 +1605,10 @@ uart12: serial@a94000 {
reg = <0x0 0x00a94000 0x0 0x4000>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 5 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
@@ -1501,6 +1617,10 @@ i2c13: i2c@a98000 {
reg = <0x0 0x00a98000 0x0 0x4000>;
interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
+ <&gpi_dma1 1 6 QCOM_GPI_I2C>;
+ dma-names = "tx", "rx";
+
#address-cells = <1>;
#size-cells = <0>;
@@ -1512,6 +1632,10 @@ spi13: spi@a98000 {
reg = <0x0 0x00a98000 0x0 0x4000>;
interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>,
+ <&gpi_dma1 1 6 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
+
status = "disabled";
};
--
2.47.3