RE: [PATCH v2] PCI: hv: hardwire PCI_INTERRUPT_PIN to 0

From: Michael Kelley

Date: Thu Sep 24 2026 - 22:18:55 EST


From: wei.liu@xxxxxxxxxx <wei.liu@xxxxxxxxxx> Sent: Sunday, September 13, 2026 4:23 PM
>

In the patch Subject, capitalize "Hardwire" for historical consistency. See [1].

> Hyper-V Discrete Device Assignment (DDA) does not support legacy (INTX)
> interrupts. When PCI_INTERRUPT_PIN is read, the pci-hyperv controller,
> which captures configuration space accesses, returns 0 to the caller.
>
> However, the current code only captures 8bit read access, thus 16bit/32bit
> are missed, forwarded to the host/HW, and may yield a non zero value.
>
> This fix addresses this issue, and makes sure that PCI_INTERRUPT_PIN is
> hardwired to 0, while the other bytes, are those returned by the host/HW.

It took me a bit to figure out what the above two paragraphs mean. For
more precision, how about:

The current code recognizes PCI_INTERRUPT_PIN reads and forces a zero
value, but only for 8 bit reads. If a 16 or 32 bit read overlaps the field, it
may be returned as a non-zero value. Fix this by recognizing such overlap,
and forcing the PCI_INTERRUPT_PIN byte to zero while retaining the
adjacent bytes returned by the host/HW.

>
> Signed-off-by: Asher Kariv <askariv@xxxxxxxxxxxxx>
> Signed-off-by: Mukesh R <mrathor@xxxxxxxxxxxxxxxxxxx>
> Signed-off-by: Wei Liu <wei.liu@xxxxxxxxxx>
> ---
> I found this in our internal tree, massaged the code and commit message,
> and posted it.
>
> v2: fix a compilation error
> ---
> drivers/pci/controller/pci-hyperv.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c
> index 89816a2bd7cd..bb4e6ca4ac1c 100644
> --- a/drivers/pci/controller/pci-hyperv.c
> +++ b/drivers/pci/controller/pci-hyperv.c
> @@ -1240,6 +1240,16 @@ static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where,
> mb();
> }
> spin_unlock_irqrestore(&hbus->config_lock, flags);
> +
> + /*
> + * Make sure PCI_INTERRUPT_PIN is hard-wired to 0, since it
> + * may be read using a 32bit read, which is skipped by the

"may be included in a 16 bit or 32 bit read, which is skipped by the"

> + * above emulation.
> + */
> + if (where <= PCI_INTERRUPT_PIN &&
> + PCI_INTERRUPT_PIN < (where + size))
> + *((char *)val + PCI_INTERRUPT_PIN - where) = 0;
> +

Does this same handling need to be applied to PCI_INTERRUPT_LINE?

> } else {
> dev_err(dev, "Attempt to read beyond a function's config space.\n");
> }

Michael

[1] https://lore.kernel.org/linux-hyperv/20240701172053.GA10100@bhelgaas/