[PATCH 6/7] arm64: dts: apple: t6031: Add NVMe device nodes

[Janne Grunau]

Apple silicon SoCs have a built-in NVMe host controller. Using it
requires device nodes for its IOMMU (SART), its mailbox and the ANS
coprocessor implementing the NVMe host controller.
Since the NAND chips on the M3 Ultra are connected to its second die use
t6031-nvme.dtsi for the NVMe device nodes.

Signed-off-by: Janne Grunau <j@xxxxxxxxxx>
---
 arch/arm64/boot/dts/apple/t6031-nvme.dtsi | 46 +++++++++++++++++++++++++++++++
 arch/arm64/boot/dts/apple/t6031.dtsi      |  1 +
 arch/arm64/boot/dts/apple/t6032.dtsi      |  1 +
 3 files changed, 48 insertions(+)

diff --git a/arch/arm64/boot/dts/apple/t6031-nvme.dtsi b/arch/arm64/boot/dts/apple/t6031-nvme.dtsi
new file mode 100644
index 000000000000..d3831bbc2bf2
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t6031-nvme.dtsi
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * NVMe related devices for Apple T603x SoCs.
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+&SOC_NODE {
+	DIE_NODE(ans_mbox): mbox@349408000 {
+		compatible = "apple,t6031-asc-mailbox", "apple,asc-mailbox-v4";
+		reg = <0x3 0x49408000 0x0 0x4000>;
+		interrupt-parent = <&aic>;
+		interrupts = <AIC_IRQ DIE_NO 1274 IRQ_TYPE_LEVEL_HIGH>,
+			     <AIC_IRQ DIE_NO 1275 IRQ_TYPE_LEVEL_HIGH>,
+			     <AIC_IRQ DIE_NO 1276 IRQ_TYPE_LEVEL_HIGH>,
+			     <AIC_IRQ DIE_NO 1277 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "send-empty", "send-not-empty",
+				  "recv-empty", "recv-not-empty";
+		#mbox-cells = <0>;
+		power-domains = <&DIE_NODE(ps_ans)>;
+	};
+
+	DIE_NODE(sart): sart@34dc50000 {
+		compatible = "apple,t6031-sart", "apple,t6000-sart";
+		reg = <0x3 0x4dc50000 0x0 0x10000>;
+		power-domains = <&DIE_NODE(ps_ans)>;
+	};
+
+	DIE_NODE(nvme): nvme@34dcc0000 {
+		compatible = "apple,t6031-nvme-ans2", "apple,t8103-nvme-ans2";
+		reg = <0x3 0x4dcc0000 0x0 0x40000>,
+		      <0x3 0x49400000 0x0 0x4000>;
+		reg-names = "nvme", "ans";
+		interrupt-parent = <&aic>;
+		/* The NVME interrupt is always routed to die 0 */
+		interrupts = <AIC_IRQ 0 2366 IRQ_TYPE_LEVEL_HIGH>;
+		mboxes = <&DIE_NODE(ans_mbox)>;
+		power-domains = <&DIE_NODE(ps_ans)>,
+				<&DIE_NODE(ps_apcie_sys_st)>,
+				<&DIE_NODE(ps_apcie_sys_st1)>;
+		power-domain-names = "ans", "apcie0", "apcie1";
+		resets = <&DIE_NODE(ps_ans)>;
+
+		apple,sart = <&DIE_NODE(sart)>;
+	};
+};
diff --git a/arch/arm64/boot/dts/apple/t6031.dtsi b/arch/arm64/boot/dts/apple/t6031.dtsi
index a2aa64ea9db9..30a91c1a47d2 100644
--- a/arch/arm64/boot/dts/apple/t6031.dtsi
+++ b/arch/arm64/boot/dts/apple/t6031.dtsi
@@ -39,6 +39,7 @@ soc: soc {
 #include "t6031-die0.dtsi"
 #include "t6031-dieX.dtsi"
 #include "t6031-gpio-pins.dtsi"
+#include "t6031-nvme.dtsi"
 #include "t6031-pmgr.dtsi"
 
 #undef DIE
diff --git a/arch/arm64/boot/dts/apple/t6032.dtsi b/arch/arm64/boot/dts/apple/t6032.dtsi
index efe56d2a9a79..2a3a1fed59df 100644
--- a/arch/arm64/boot/dts/apple/t6032.dtsi
+++ b/arch/arm64/boot/dts/apple/t6032.dtsi
@@ -362,6 +362,7 @@ die1: soc@2200000000 {
 #define SOC_NODE die1
 
 #include "t6031-dieX.dtsi"
+#include "t6031-nvme.dtsi"
 #include "t6031-pmgr.dtsi"
 
 /delete-node/ &ps_pmp_die1;

-- 
2.55.0