Re: [PATCH Intenal 1/2] EDAC/amd64: Add support for AMD family 1Ah models 80h-8Fh
From: Yazen Ghannam
Date: Fri Sep 25 2026 - 11:52:49 EST
On Thu, Sep 24, 2026 at 10:11:46AM -0400, Yazen Ghannam wrote:
> On Wed, Sep 23, 2026 at 04:50:02PM +0530, Vishal Badole wrote:
> > Add support for family 1Ah-based models 80h-8Fh.
> >
> > Signed-off-by: Vishal Badole <Vishal.Badole@xxxxxxx>
> > ---
> > drivers/edac/amd64_edac.c | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> > index c6aa69dbd9fb..ff0ebc8e15f6 100644
> > --- a/drivers/edac/amd64_edac.c
> > +++ b/drivers/edac/amd64_edac.c
> > @@ -3900,6 +3900,10 @@ static int per_family_init(struct amd64_pvt *pvt)
> > pvt->max_mcs = 16;
> > pvt->flags.zn_regs_v2 = 1;
> > break;
> > + case 0x80 ... 0x8f:
> > + pvt->max_mcs = 2;
>
> Should this be '4'?
>
> In documentation, I see 4 UMC MCA banks, and the UMC register
> definitions list UMC0-UMC3 instances.
>
Correction: 2 and 4 are both correct. But the models numbers are wrong.
0x80-0x87 => 4 UMCs
0x88-0x8F => 2 UMCs
Vishal is working on a patch using a different approach.
Thanks,
Yazen