Re: [PATCH] phy: HiSilicon: Fix error handling in hi3670_pcie_allclk_ctrl()

[Manivannan Sadhasivam]

On Wed, Jul 08, 2026 at 04:31:00PM -0500, Akash Sukhavasi wrote:
> When hi3670_pcie_pll_ctrl() fails, hi3670_pcie_allclk_ctrl() returns
> -EINVAL directly, skipping the close_clocks cleanup path. This leaves
> the PLL with its power-down bit cleared.
> 
> Use goto close_clocks instead, which disables the PLL and propagates
> the original error code from hi3670_pcie_pll_ctrl().
> 
> Found while investigating a Smatch warning.
> 
> Fixes: 73075011ffff ("phy: HiSilicon: Add driver for Kirin 970 PCIe PHY")
> Signed-off-by: Akash Sukhavasi <akash.sukhavasi@xxxxxxxxx>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxxxxxxxx>

- Mani

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