RE: [PATCH 1/4] ASoC: dt-bindings: Add Cadence I2S-SC controller

[Joakim Zhang (张强庆)]

Hello Rob,


> -----Original Message-----
> From: Rob Herring <robh@xxxxxxxxxx>
> Sent: Friday, September 25, 2026 8:30 PM
> To: Joakim Zhang (张强庆) <joakim.zhang@xxxxxxxxxxx>
> Cc: Mark Brown <broonie@xxxxxxxxxx>; lgirdwood@xxxxxxxxx; krzk+dt@xxxxxxxxxx;
> conor+dt@xxxxxxxxxx; perex@xxxxxxxx; tiwai@xxxxxxxx; p.zabel@xxxxxxxxxxxxxx;
> cix-kernel-upstream <cix-kernel-upstream@xxxxxxxxxxx>; linux-
> sound@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH 1/4] ASoC: dt-bindings: Add Cadence I2S-SC controller
> 
> EXTERNAL EMAIL
> 
> On Thu, Sep 24, 2026 at 07:33:12AM +0000, Joakim  Zhang (张强庆) wrote:
> >
> > Hello,
> >
> > > -----Original Message-----
> > > From: Mark Brown <broonie@xxxxxxxxxx>
> > > Sent: Tuesday, September 22, 2026 10:24 PM
> > > To: Joakim Zhang (张强庆) <joakim.zhang@xxxxxxxxxxx>
> > > Cc: lgirdwood@xxxxxxxxx; robh@xxxxxxxxxx; krzk+dt@xxxxxxxxxx;
> > > conor+dt@xxxxxxxxxx; perex@xxxxxxxx; tiwai@xxxxxxxx;
> > > conor+p.zabel@xxxxxxxxxxxxxx;
> > > cix-kernel-upstream <cix-kernel-upstream@xxxxxxxxxxx>; linux-
> > > sound@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx;
> > > linux-kernel@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
> > > Subject: Re: [PATCH 1/4] ASoC: dt-bindings: Add Cadence I2S-SC
> > > controller
> > >
> > > On Tue, Sep 22, 2026 at 07:21:31PM +0800, joakim.zhang@xxxxxxxxxxx wrote:
> > >
> > > > Add the DT binding for the Cadence I2S-SC controller integrated in
> > > > the CIX SKY1 audio subsystem. I2S-SC is a full-duplex stereo
> > > > controller supporting standard I2S, left/right-justified and DSP
> > > > formats, plus TDM operation with up to 16 slots.
> > >
> > > > +properties:
> > > > +  compatible:
> > > > +    const: cix,sky1-i2s-sc
> > >
> > > Should there be some general Cadence fallback for this if it's a Cadence IP?
> >
> > Yes, cdns,sky1-i2s-sc should be better.
> 
> No. Cadence has nothing to do with sky1. It would be the above *plus* a Cadence
> fallback compatible.
> 
> I'm on the fence whether a Cadence compatible is useful. For complex IP (e.g. PCIe,
> USB, etc.), IP vendor fallbacks have proven to be not useful. For simple IP blocks,
> they can be useful. It also depends if there is a h/w manual which can be used so we
> can really define the correct numbers of clocks, interrupts, etc. Perhaps I2S is simple
> enough.


Understood, thanks.
The integration is not stock Cadence IP: the two audio reference clocks feeding the parent mux are SCMI clocks provided by the system firmware, and the reset and APB clock come from the CIX audio subsystem CRU, so a generic "cdns,i2s-sc" binding could not describe the clock model accurately. There is also no publicly available Cadence manual for this IP to base a generic binding on. Unless a second integrator of the same IP shows up, I would like to keep the CIX-specific compatible only; the fallback can be added later without breaking existing DTs.

Joakim