Re: [RFC PATCH net-next v3 4/5] net: dsa: qca8k: flag QCA8337 internal CPU PHYs for SmartSpeed

[Yongzhao Chen]

Hi Andrew,

Following up on the initialisation order, as promised. On this board
it was the cause, and the DT workaround is not needed.

The IPQ5018 GE PHY leaves reset in ipq5018_probe() and starts
autonegotiating with its reset defaults. Its LDO, EEE, MSE and DAC
settings are only written in ipq5018_config_init(), when stmmac
attaches the PHY on open, about 39 s later on this board. I sampled
both PHYs during that window. They resolved 1000BASE-T every 2.5 to 3 s
without getting link, and after about five attempts SmartSpeed
downshifted on both sides at the same moment: the IPQ5018 PHY's
CTRL1000 went 0x0200 -> 0x0000 and PHY4's 0x0600 -> 0x0400. The soft
reset at attach restores the IPQ5018 side, but nothing touches PHY4
again, so the CPU link never came up.

Applying the same analog settings in probe, right after the reset, and
restarting autonegotiation, fixed it with SmartSpeed left enabled on
the QCA8337: 3 of 3 warm boots came up at 1 Gb/s about 2.5 s after PHY4
was reset, against 0 of 3 without it. Both groups ran the same kernel
and rootfs, with the probe-time writes enabled by a private DT property.
The final patch was then checked on the same board over a first boot,
three reboots, three interface down/up cycles, three renegotiations, a
network restart and a 10 minute observation, all at 1 Gb/s with
SmartSpeed enabled. It is still one board, and I have not done a
power-cycle test on this kernel.

So I will not add the workaround property. I will send the at803x
change to net together with the DAC fix, and v4 of this series without
patches 4 and 5. George, I've Cc'd you since the at803x change touches
the IPQ5018 probe path you added.

Thanks,
Yongzhao