Re: [PATCH v7 04/10] ASoC: qcom: Add QAIF CPU DAI ops, regmap, DT parsing and platform init

[Harendra Gautam]

>
> > +     /*
> > +      * The sync, lane and frame configuration and the MI2S bit clock are
> > +      * shared by both directions of an AIF. Concurrent playback and
> > +      * capture on the same interface are therefore expected to use a
> > +      * compatible format, rate and slot configuration.
> > +      */
>
> What enforces this?
Both directions share the bit clock and slot width, so rate and sample
bits must match on concurrent streams. Would adding symmetric_rate and
symmetric_sample_bits to the AIF DAI entries work?


> > +             case SND_SOC_DAIFMT_I2S:
> > +                     cfg->sync_mode = QAIF_AIF_SYNC_MODE_LONG;
> > +                     cfg->sync_delay = QAIF_AIF_SYNC_DELAY_ONE;
> > +                     cfg->invert_sync = true;
> > +                     break;
>
> Does this line up with the clock inversion in set_fmt()?
invert_sync for I2S is set at probe via DT parse but the INV_MASK
switch in set_fmt() could incorrectly clear it. Will fix it in the
next version.
-Harendra