Re: [PATCH v3 4/5] clocksource: mips-gic-timer: Simplify gic_next_event() for per-cpu timer

From: Thomas Bogendoerfer

Date: Mon Sep 28 2026 - 05:56:27 EST


On Mon, Sep 07, 2026 at 02:46:38PM +0200, Benoît Monin wrote:
> The GIC clock event device is registered per CPU and is flagged with
> CLOCK_EVT_FEAT_C3STOP. This guarantees that the set_next_event() callback
> is always invoked on the CPU of the event.
>
> Drop the code path configuring the compare register of another CPU as it
> is never called and does not correctly handle the case of having multiple
> clusters, and document this guarantee by adding the CLOCK_EVT_FEAT_PERCPU
> flag to the clock event device features.
>
> Signed-off-by: Benoît Monin <benoit.monin@xxxxxxxxxxx>
> ---
> drivers/clocksource/mips-gic-timer.c | 10 +++-------
> 1 file changed, 3 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
> index 1501c7db9a8e..cdaf4ba1d509 100644
> --- a/drivers/clocksource/mips-gic-timer.c
> +++ b/drivers/clocksource/mips-gic-timer.c
> @@ -52,18 +52,13 @@ static u64 notrace gic_read_count(void)
>
> static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
> {
> - int cpu = cpumask_first(evt->cpumask);
> u64 cnt;
> int res;
>
> cnt = gic_read_count();
> cnt += (u64)delta;
> - if (cpu == raw_smp_processor_id()) {
> - write_gic_vl_compare(cnt);
> - } else {
> - write_gic_vl_other(mips_cm_vp_id(cpu));
> - write_gic_vo_compare(cnt);
> - }
> + write_gic_vl_compare(cnt);
> +
> res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
> return res;
> }
> @@ -82,6 +77,7 @@ static void gic_clockevent_cpu_init(unsigned int cpu,
> {
> cd->name = "MIPS GIC";
> cd->features = CLOCK_EVT_FEAT_ONESHOT |
> + CLOCK_EVT_FEAT_PERCPU |
> CLOCK_EVT_FEAT_C3STOP;
>
> cd->rating = 350;
>
> --
> 2.55.0

Reviewed-by: Thomas Bogendoerfer <tsbogend@xxxxxxxxxxxxxxxx>

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