[PATCH v3 17/31] gpu: nova-core: vgpu: query VF assignments and properties
From: Zhi Wang
Date: Mon Sep 28 2026 - 06:36:42 EST
Creating an instance requires its VF assignment and the corresponding
vGPU properties before reserving resources.
Call Cmdq's synchronous GMC interface with each query's command ID,
request payload and receive capacity. Check the matching reply's
firmware status before decoding it, and report the command and raw
NV_STATUS when firmware rejects the request.
Decode the VF assignment and NVKV property replies at their query entry
points. Validate the returned type ID and nonzero instance limit, and
initialize the decoded properties on the heap. Keep the raw queue
interface available to firmware-control clients.
Co-developed-by: Eliot Courtney <ecourtney@xxxxxxxxxx>
Signed-off-by: Eliot Courtney <ecourtney@xxxxxxxxxx>
Signed-off-by: Zhi Wang <zhiw@xxxxxxxxxx>
---
drivers/gpu/nova-core/gsp.rs | 1 +
drivers/gpu/nova-core/gsp/cmdq.rs | 3 -
drivers/gpu/nova-core/gsp/fw.rs | 2 +-
drivers/gpu/nova-core/vgpu.rs | 2 +
drivers/gpu/nova-core/vgpu/commands.rs | 91 ++++++++++++++++++++++
drivers/gpu/nova-core/vgpu/fw.rs | 17 ++++
drivers/gpu/nova-core/vgpu/fw/commands.rs | 95 +++++++++++++++++++++++
7 files changed, 207 insertions(+), 4 deletions(-)
create mode 100644 drivers/gpu/nova-core/vgpu/commands.rs
create mode 100644 drivers/gpu/nova-core/vgpu/fw.rs
create mode 100644 drivers/gpu/nova-core/vgpu/fw/commands.rs
diff --git a/drivers/gpu/nova-core/gsp.rs b/drivers/gpu/nova-core/gsp.rs
index 25b4bf6eb848..45645bc7c9d8 100644
--- a/drivers/gpu/nova-core/gsp.rs
+++ b/drivers/gpu/nova-core/gsp.rs
@@ -32,6 +32,7 @@
mod regs;
pub(crate) use fw::{
+ r000_00 as bindings,
GspFmcBootParams,
GspFwWprMeta,
LibosMemoryRegionInitArgument,
diff --git a/drivers/gpu/nova-core/gsp/cmdq.rs b/drivers/gpu/nova-core/gsp/cmdq.rs
index 43038c7fe823..abd9edadff64 100644
--- a/drivers/gpu/nova-core/gsp/cmdq.rs
+++ b/drivers/gpu/nova-core/gsp/cmdq.rs
@@ -551,10 +551,8 @@ fn payload_length(&self) -> Option<usize> {
/// Response from a GMC API command.
pub(crate) struct GmcResponse {
/// Response status (`NV_STATUS` code). Zero means success.
- #[expect(dead_code)]
pub(crate) status: u32,
/// Response payload copied out of the message queue.
- #[expect(dead_code)]
pub(crate) payload: KVec<u8>,
}
@@ -708,7 +706,6 @@ pub(crate) fn send_gmc_no_wait(
/// # Errors
///
/// Returns the same errors as [`Self::send_gmc_and_receive_timeout`].
- #[expect(dead_code)]
pub(crate) fn send_gmc_and_receive(
&self,
command_id: u32,
diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw.rs
index a416826737bb..aef283dda087 100644
--- a/drivers/gpu/nova-core/gsp/fw.rs
+++ b/drivers/gpu/nova-core/gsp/fw.rs
@@ -2,7 +2,7 @@
// SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
pub(crate) mod commands;
-mod r000_00;
+pub(crate) mod r000_00;
// Alias to avoid repeating the version number with every use.
use r000_00 as bindings;
diff --git a/drivers/gpu/nova-core/vgpu.rs b/drivers/gpu/nova-core/vgpu.rs
index 1402e37541b7..d910445dd2b0 100644
--- a/drivers/gpu/nova-core/vgpu.rs
+++ b/drivers/gpu/nova-core/vgpu.rs
@@ -20,6 +20,8 @@
gsp::commands::FifoEngineList, //
};
+mod commands;
+mod fw;
mod hal;
mod vram;
diff --git a/drivers/gpu/nova-core/vgpu/commands.rs b/drivers/gpu/nova-core/vgpu/commands.rs
new file mode 100644
index 000000000000..679c22b0381a
--- /dev/null
+++ b/drivers/gpu/nova-core/vgpu/commands.rs
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0
+// SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+
+//! vGPU firmware command operations.
+//!
+//! Sends requests, checks responses and coordinates the firmware command
+//! sequences used by instance lifecycle operations.
+
+use kernel::{
+ device,
+ prelude::*, //
+};
+
+use crate::gsp::{
+ cmdq::Cmdq,
+ nvkv::{
+ nvkv_words,
+ Decoder,
+ UnknownKeyPolicy, //
+ }, //
+};
+
+use super::{
+ fw::{
+ commands::{
+ VgpuPropertiesSchema, //
+ },
+ GMCAPI_CMD_QUERY_ASSIGNED_VF_VGPU_TYPE,
+ GMCAPI_CMD_QUERY_VGPU_PROPERTIES, //
+ }, //
+};
+
+pub(super) use super::fw::commands::{
+ Dbdf,
+ VgpuProperties, //
+};
+
+/// Reports a matching command's raw firmware status before translating rejection to `EIO`.
+fn check_status(dev: &device::Device<device::Bound>, command_id: u32, status: u32) -> Result {
+ if status == 0 {
+ Ok(())
+ } else {
+ dev_err!(
+ dev,
+ "GMC command {:#x} rejected: NV_STATUS={:#x}\n",
+ command_id,
+ status,
+ );
+ Err(EIO)
+ }
+}
+
+/// Query the vGPU type assigned to a VF by its DBDF.
+#[expect(dead_code)]
+pub(super) fn query_assigned_vf_type(
+ dev: &device::Device<device::Bound>,
+ cmdq: &Cmdq<'_>,
+ dbdf: Dbdf,
+) -> Result<u32> {
+ let command_id = GMCAPI_CMD_QUERY_ASSIGNED_VF_VGPU_TYPE;
+ let payload = u64::from(dbdf.into_raw()).to_le_bytes();
+ // Preserve the firmware receive budget; only the leading type ID is consumed.
+ let response = cmdq.send_gmc_and_receive(command_id, &payload, 64)?;
+ check_status(dev, command_id, response.status)?;
+
+ let bytes = response.payload.first_chunk::<4>().ok_or(ENODEV)?;
+ Ok(u32::from_le_bytes(*bytes))
+}
+
+/// Query and decode the firmware properties of one vGPU type.
+#[expect(dead_code)]
+pub(super) fn query_vgpu_properties(
+ dev: &device::Device<device::Bound>,
+ cmdq: &Cmdq<'_>,
+ type_id: u32,
+) -> Result<KBox<VgpuProperties>> {
+ let command_id = GMCAPI_CMD_QUERY_VGPU_PROPERTIES;
+ // NVKV replies vary in length. This is a receive capacity, not their encoded size.
+ let response = cmdq.send_gmc_and_receive(command_id, &type_id.to_le_bytes(), 4096)?;
+ check_status(dev, command_id, response.status)?;
+
+ let words = nvkv_words(&response.payload, &[])?;
+ let decoder = Decoder::new(&words, UnknownKeyPolicy::Ignore);
+ let mut schema = VgpuPropertiesSchema::default();
+ let properties = KBox::try_init(decoder.decode(&mut schema)?, GFP_KERNEL)?;
+ if properties.type_id != type_id || properties.max_instance == 0 {
+ Err(EINVAL)
+ } else {
+ Ok(properties)
+ }
+}
diff --git a/drivers/gpu/nova-core/vgpu/fw.rs b/drivers/gpu/nova-core/vgpu/fw.rs
new file mode 100644
index 000000000000..23097cb13121
--- /dev/null
+++ b/drivers/gpu/nova-core/vgpu/fw.rs
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+// SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+
+//! vGPU firmware interface.
+//!
+//! Exposes command constants and communication buffer layout types from
+//! raw firmware bindings.
+
+pub(super) mod commands;
+
+use crate::gsp::bindings;
+
+pub(super) const GMCAPI_CMD_QUERY_ASSIGNED_VF_VGPU_TYPE: u32 =
+ bindings::GMCAPI_COMMANDS_GMCAPI_CMD_QUERY_ASSIGNED_VF_VGPU_TYPE;
+
+pub(super) const GMCAPI_CMD_QUERY_VGPU_PROPERTIES: u32 =
+ bindings::GMCAPI_COMMANDS_GMCAPI_CMD_QUERY_VGPU_PROPERTIES;
diff --git a/drivers/gpu/nova-core/vgpu/fw/commands.rs b/drivers/gpu/nova-core/vgpu/fw/commands.rs
new file mode 100644
index 000000000000..a4d23eae8233
--- /dev/null
+++ b/drivers/gpu/nova-core/vgpu/fw/commands.rs
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0
+// SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+
+//! Wire types and codecs for vGPU commands.
+//!
+//! Defines request encoders and response schemas independently of command
+//! submission and instance lifecycle operations.
+
+use kernel::{
+ alloc::ArrayVec,
+ bitfield, //
+};
+
+use crate::{
+ gsp::nvkv::{
+ nvkv_decode,
+ Array,
+ Key,
+ KeyId,
+ Required, //
+ }, //
+};
+
+bitfield! {
+ pub(crate) struct Dbdf(u32) {
+ 2:0 function;
+ 7:3 device;
+ 15:8 bus;
+ 31:16 domain;
+ }
+}
+
+nvkv_decode! {
+ pub(crate) struct VgpuPropertiesSchema => VgpuProperties {
+ // TODO: `name`/`class` required?
+ name: Array<u8, { VgpuProperties::STRING_LEN }, { Self::TYPE_NAME_KEY }>,
+ class: Array<u8, { VgpuProperties::STRING_LEN }, { Self::CLASS_KEY }>,
+ type_id: Required<u32, { Self::TYPE_ID_KEY }>,
+ bar1_length: Required<u64, { Self::BAR1_LENGTH_KEY }>,
+ max_instance: Required<u32, { Self::MAX_INSTANCE_KEY }>,
+ ecc: Key<u32, { Self::ECC_KEY }>,
+ profile_size: Required<u64, { Self::PROFILE_SIZE_KEY }>,
+ max_fps: Key<u32, { Self::MAX_FPS_KEY }>,
+ num_heads: Key<u32, { Self::NUM_HEADS_KEY }>,
+ max_res_x: Key<u32, { Self::MAX_RES_X_KEY }>,
+ max_res_y: Key<u32, { Self::MAX_RES_Y_KEY }>,
+ dev_id: Required<u32, { Self::DEV_ID_KEY }>,
+ subsystem_id: Required<u32, { Self::SUBSYSTEM_ID_KEY }>,
+ fb_length: Required<u64, { Self::FB_LENGTH_KEY }>,
+ gsp_heap_size: Required<u64, { Self::GSP_HEAP_SIZE_KEY }>,
+ fb_reservation: Required<u64, { Self::FB_RESERVATION_KEY }>,
+ }
+}
+
+impl VgpuPropertiesSchema {
+ const TYPE_NAME_KEY: KeyId = 0x3100;
+ const CLASS_KEY: KeyId = 0x3101;
+ const TYPE_ID_KEY: KeyId = 0x3102;
+ const BAR1_LENGTH_KEY: KeyId = 0x3103;
+ const MAX_INSTANCE_KEY: KeyId = 0x3104;
+ const ECC_KEY: KeyId = 0x3105;
+ const PROFILE_SIZE_KEY: KeyId = 0x3106;
+ const MAX_FPS_KEY: KeyId = 0x3107;
+ const NUM_HEADS_KEY: KeyId = 0x3108;
+ const MAX_RES_X_KEY: KeyId = 0x3109;
+ const MAX_RES_Y_KEY: KeyId = 0x310A;
+ const DEV_ID_KEY: KeyId = 0x310B;
+ const SUBSYSTEM_ID_KEY: KeyId = 0x310C;
+ const FB_LENGTH_KEY: KeyId = 0x310D;
+ const GSP_HEAP_SIZE_KEY: KeyId = 0x310E;
+ const FB_RESERVATION_KEY: KeyId = 0x310F;
+}
+
+pub(crate) struct VgpuProperties {
+ name: ArrayVec<u8, { Self::STRING_LEN }>,
+ class: ArrayVec<u8, { Self::STRING_LEN }>,
+ pub(crate) type_id: u32,
+ pub(crate) bar1_length: u64,
+ pub(crate) max_instance: u32,
+ ecc: u32,
+ profile_size: u64,
+ max_fps: u32,
+ num_heads: u32,
+ max_res_x: u32,
+ max_res_y: u32,
+ pub(crate) dev_id: u32,
+ pub(crate) subsystem_id: u32,
+ pub(crate) fb_length: u64,
+ pub(crate) gsp_heap_size: u64,
+ fb_reservation: u64,
+}
+
+impl VgpuProperties {
+ const STRING_LEN: usize = 64;
+}