[PATCH 0/5] sparc64: Report the M7 hardware capabilities

[Stian Halseth]

A SPARC M7 lists 28 capabilities in its machine description. The kernel
only recognises 20, so AT_HWCAP is missing six the chip has.

The list is readable from userspace through /dev/mdesc. All 256 cpu
nodes on a T7-1 carry the same one:

    vis vis2 popc vis3 vis3b fmaf hpc ASIBlkInit ima pause pause-nsec
    cbcond mwait adp sparc5 cfr aes des camellia md5 sha1 sha256 sha512
    mpmul mont crc32c xmpmul xmont

Patch 1 prints what is not recognised. Patches 2 to 5 handle the M7
entries.

VA masking is not in the hwcap-list. The cpu node carries
va-mask-nz-mask instead, so patch 4 reads that rather than matching on
sun4v_chip_type.

AT_HWCAP before and after:

    T7-1 (M7)   0xf47fbdf  ->  0x1ff47fbdf
    T4-1        0x747fbdf  ->  0x747fbdf

The T4 is unchanged by design. Once patch 5 is in, its machine
description names nothing the kernel lacks, and its CFR stops at bit 11.

'cfr' is still reported as unrecognised on the M7. It states that the
CFR register is present rather than naming a capability. It cannot be
used to gate the rd %asr26 reads either: a T4 has the register but does
not advertise it.

Stian Halseth (5):
  sparc64: Report unrecognised machine description hwcap-list entries
  sparc64: Add the M7 capabilities carried in the hwcap-list
  sparc64: Report the extended crypto capabilities
  sparc64: Derive VA masking support from the machine description
  sparc64: Match the machine description's combined crypto names

 arch/sparc/include/asm/elf_64.h |  9 ++++++
 arch/sparc/kernel/setup_64.c    | 57 +++++++++++++++++++++++++++++++--
 2 files changed, 64 insertions(+), 2 deletions(-)

-- 
2.43.0