Re: [PATCH 4/5] dt-bindings: net: maxlinear: add MxL86211C lane mapping support

[Krzysztof Kozlowski]

On Wed, Sep 30, 2026 at 02:22:16PM +0200, Robert Marko wrote:
> Describe the optional lane-to-ASP mapping for the MxL86211C PHY.
> 
> The mapping accounts for board-level swaps between its physical TPI
> lanes and analog signal processing lanes.
> 
> MxL86211C supports per lane mapping.
> 
> Signed-off-by: Robert Marko <robert.marko@xxxxxxxxxx>
> ---
>  .../bindings/net/maxlinear,gpy2xx.yaml        | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml b/Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml
> index 0645e885f1747..b98cb3c3e6d49 100644
> --- a/Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml
> +++ b/Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml
> @@ -22,6 +22,21 @@ allOf:
>  
>      then:
>        properties:
> +        maxlinear,lane-asp-map:
> +          description: |
> +            Mapping of the physical TPI lanes A through D to the PHY's
> +            analog signal processing lanes (ASPs). The array index identifies

Are there other lanes as well? Not ASP? What sort? data-lanes does not
fit here?

> +            physical lane A, B, C, or D, while its value identifies ASP A, B,
> +            C, or D, encoded as 0 through 3. Each ASP must be mapped exactly
> +            once. Omit the property to retain the hardware reset mapping.
> +          $ref: /schemas/types.yaml#/definitions/uint32-array

Best regards,
Krzysztof