[PATCH 0/6] thermal: Add hardware-binned trip point support

From: Gaurav Kohli

Date: Fri Oct 02 2026 - 06:51:30 EST


Some SoCs are available in multiple thermal/package bins. The silicon is
otherwise the same, but the package/bin determines which junction
temperature limits are valid for a given part. This information is
programmed in manufacturing fuses and needs to be reflected in the trip
points used by the kernel.

At the moment this is difficult to describe cleanly. Board-specific trip
overrides can handle individual cases, but they do not describe the real
hardware property: the limit is selected by SoC fuse state, not by board
identity. Duplicating thermal zones or adding vendor-specific trip
properties would also make the binding harder to share across platforms.

This series adds generic hardware-binned trip point support to the
thermal OF parser, following the same general model as the OPP
framework's opp-supported-hw property. A thermal sensor driver provides
the decoded hardware bin when registering a thermal zone, and the OF
parser uses that information to select the applicable trip data.

Two generic trip-point properties are added:

- thermal-hw-bin:
one or more hardware-bin mask groups for which the trip is valid

- temperature-bin:
per-bin trip temperatures, selected by the matching
thermal-hw-bin group

This topic was discussed at the Linux Plumbers Conference Power and
Thermal Management microconference as "Thermal binning support". The
discussion covered how to represent SoCs whose valid junction temperature
limits depend on package/bin characteristics. The approach taken here is
to keep the DT description generic and let the platform thermal driver
provide the hardware-specific fuse decoding.

LPC discussion:
https://lpc.events/event/19/contributions/2245/

Slides:
https://lpc.events/event/19/contributions/2245/attachments/1885/4034/LPC2025-Thermal-Microconf-Amit-Tj-Thermal-binning.pdf

Qualcomm TSENS is added as the first user of the generic support. On
SC7280/QCM6490-class platforms, TSENS reads the jtag-id and feat-id
QFPROM cells and maps them to the thermal hardware bin. On
X1E80100-class platforms, TSENS reads the i-temp QFPROM bit. The decoded
bin is passed to the thermal OF registration path before trip points are
parsed.

The DTS patches use the new properties for the affected Kodiak and Hamoa
thermal zones. For the standard bin the passive trip remains at 95C; for
the elevated bin it is selected as 105C.

Signed-off-by: Gaurav Kohli <gaurav.kohli@xxxxxxxxxxxxxxxx>
---
Amit Kucheria (6):
dt-bindings: thermal: thermal-zones: add hardware-binning trip properties
thermal: add hardware-binning trip-point filtering support
dt-bindings: thermal: qcom-tsens: document qcm6490 tsens
thermal: qcom: tsens: add hardware-bin trip-point filtering
arm64: dts: qcom: kodiak: use thermal hw-bin trips
arm64: dts: qcom: hamoa: add thermal hw-bin support

.../devicetree/bindings/thermal/qcom-tsens.yaml | 8 +
.../devicetree/bindings/thermal/thermal-zones.yaml | 53 ++++-
.../driver-api/thermal/hardware-binning.rst | 151 ++++++++++++
Documentation/driver-api/thermal/index.rst | 1 +
MAINTAINERS | 2 +
arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 66 ------
arch/arm64/boot/dts/qcom/hamoa.dtsi | 41 +++-
arch/arm64/boot/dts/qcom/kodiak.dtsi | 56 +++--
drivers/thermal/Kconfig | 10 +
drivers/thermal/Makefile | 1 +
drivers/thermal/qcom/Kconfig | 1 +
drivers/thermal/qcom/tsens-v2.c | 16 ++
drivers/thermal/qcom/tsens.c | 189 ++++++++++++++-
drivers/thermal/qcom/tsens.h | 29 +++
drivers/thermal/thermal_bin.c | 135 +++++++++++
drivers/thermal/thermal_core.h | 5 +
drivers/thermal/thermal_of.c | 253 +++++++++++++++++++--
include/linux/thermal.h | 77 +++++++
18 files changed, 980 insertions(+), 114 deletions(-)
---
base-commit: 0d9d0dbf2fddcff5859d623e90ca73c4054276e1
change-id: 20260917-thermal_bin-fe7becdf0e17

Best regards,
--
Gaurav Kohli <gaurav.kohli@xxxxxxxxxxxxxxxx>