Re: [PATCH 1/1] phy: freescale: fsl-samsung-hdmi: initialize default rate

[Vinod Koul]

On Thu, 03 Sep 2026 05:47:58 +0000, Aristo Chen wrote:
> The HDMI PHY clock reports 74.25 MHz when cur_cfg is unset, but does
> not establish that rate in hardware. The common clock framework caches
> the reported rate when registering the clock and skips a first
> clk_set_rate(74250000) request because the rate appears unchanged.
> 
> Consequently, a display whose initial mode uses a 74.25 MHz pixel clock
> can leave the PHY with its bootloader register state and receive no
> TMDS signal. Requesting another rate first avoids the issue because the
> set_rate callback configures the PHY.
> 
> [...]

Applied, thanks!

[1/1] phy: freescale: fsl-samsung-hdmi: initialize default rate
      commit: c01ccf91b257741e9edc374a465126bae9ae4711

Best regards,
-- 
~Vinod