[PATCH net] net: phy: realtek: fix RTL8224 package address selection

From: Oskari Lemmela

Date: Sun Oct 04 2026 - 16:53:44 EST


From: Manuel Stocker <mensi@xxxxxxxx>

The RTL8224 driver rounds each PHY address down to a multiple of four
to select the package base and uses the low two address bits as the
port index. For a package starting at an unaligned MDIO address, this
accesses shared registers at the wrong address and selects incorrect
MDI pair order and polarity fields.

The Hasivo S1100WP-8GT-2S+ uses two RTL8224 packages at MDIO
addresses 1-4 and 5-8. The aligned-address assumption splits each
physical package into incorrect software groups rather than using
the actual package bases of 1 and 5.

Use the base address from an ethernet-phy-package node when present
and calculate each port's offset relative to that address. Reject
PHY addresses outside the four-port package and propagate explicit
package errors instead of falling back to another base address.

Keep the existing aligned-address assumption when no package node
is present.

Fixes: 330296ea9e15 ("net: phy: realtek: add RTL8224 pair order support")
Signed-off-by: Manuel Stocker <mensi@xxxxxxxx>
[Oskari: rebased on net/main, reworded commit message]
Signed-off-by: Oskari Lemmela <oskari@xxxxxxxxxxx>
---
drivers/net/phy/realtek/realtek_main.c | 49 +++++++++++++++++++++++---
1 file changed, 44 insertions(+), 5 deletions(-)

diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
index 177b62a7b2d1..8405a74d631f 100644
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -340,6 +340,10 @@ struct rtl821x_priv {
u16 iner;
};

+struct rtl8224_priv {
+ u8 port_offset;
+};
+
struct rtl8261x_priv {
const char *fw_name;
bool fw_loaded;
@@ -2699,7 +2703,8 @@ static int rtl8224_package_modify_mmd(struct phy_device *phydev, int devad,
static int rtl8224_mdi_config_order(struct phy_device *phydev)
{
struct device_node *np = phydev->mdio.dev.of_node;
- u8 port_offset = phydev->mdio.addr & 3;
+ struct rtl8224_priv *priv = phydev->priv;
+ u8 port_offset = priv->port_offset;
u32 order = 0;
int ret;

@@ -2724,7 +2729,8 @@ static int rtl8224_mdi_config_order(struct phy_device *phydev)
static int rtl8224_mdi_config_polarity(struct phy_device *phydev)
{
struct device_node *np = phydev->mdio.dev.of_node;
- u8 offset = (phydev->mdio.addr & 3) * 4;
+ struct rtl8224_priv *priv = phydev->priv;
+ u8 offset = priv->port_offset * 4;
u32 polarity = 0;
int ret;

@@ -2759,9 +2765,42 @@ static int rtl8224_config_init(struct phy_device *phydev)

static int rtl8224_probe(struct phy_device *phydev)
{
- /* Chip exposes 4 ports, join all of them in the same package */
- return devm_phy_package_join(&phydev->mdio.dev, phydev,
- phydev->mdio.addr & ~3, 0);
+ struct device *dev = &phydev->mdio.dev;
+ u32 base_addr = phydev->mdio.addr & ~3;
+ struct rtl8224_priv *priv;
+ struct device_node *np;
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ np = of_get_parent(dev->of_node);
+ if (of_node_name_eq(np, "ethernet-phy-package")) {
+ ret = of_property_read_u32(np, "reg", &base_addr);
+ of_node_put(np);
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "Missing or invalid PHY package reg\n");
+
+ if (phydev->mdio.addr < base_addr ||
+ phydev->mdio.addr - base_addr >= 4)
+ return dev_err_probe(dev, -EINVAL,
+ "PHY address outside RTL8224 package\n");
+
+ ret = devm_of_phy_package_join(dev, phydev, 0);
+ } else {
+ of_node_put(np);
+ /* Without a package node, assume four aligned PHY addresses. */
+ ret = devm_phy_package_join(dev, phydev, base_addr, 0);
+ }
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to join PHY package\n");
+
+ priv->port_offset = phydev->mdio.addr - base_addr;
+ phydev->priv = priv;
+
+ return 0;
}

static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)

base-commit: 6dc989ea46b96ce170840174b4a38c4a387fb005
--
2.55.0