RE: [PATCH 2/4] arm64: tlb: Add tlbi workaround for FUJITSU-MONAKA Erratum E#030001

[Tomohiro Misono (Fujitsu)]

Hi Will,

> Subject: Re: [PATCH 2/4] arm64: tlb: Add tlbi workaround for FUJITSU-MONAKA Erratum E#030001
> 
> On Fri, Oct 02, 2026 at 07:26:50PM +0900, Tomohiro Misono wrote:
> > FUJITSU-MONAKA Erratum E#030001 affects FUJITSU-MONAKA CPU
> > when using 64k page size.
> >
> > On affected FUJITSU-MONAKA CPUs, range-based TLBI operations
> > targeting a VA or IPA may fail to invalidate TLB entries when
> > addr[34:29] == all 1 && addr[28:0] == 0 for 512MB mappings.
> > The affected instructions are:
> >   RVA[L]E{1,2,3}*, RVAA[L]E1*, and RIPAS2[L]E1*.
> >
> > Work around the erratum by issuing additional non-range
> > TLBI instructions corresponding to the affected VA or IPA
> > range-based TLBI operations.
> 
> Why don't we just avoid using range invalidation on these parts instead?

As I replied in Mark's comment, disabling range operations on MONAKA CPUs would be another solution. 
We'd like to select the option that minimizes the performance impact.

Thanks for the review.
Best Regards,
Tomohiro Misono

> 
> Will