RE: [PATCH 3/4] perf: arm_pmu: Add workaround for FUJITSU-MONAKA Erratum E#030002

[Tomohiro Misono (Fujitsu)]

Hi Will,

> Subject: Re: [PATCH 3/4] perf: arm_pmu: Add workaround for FUJITSU-MONAKA Erratum E#030002
> 
> On Fri, Oct 02, 2026 at 07:26:51PM +0900, Tomohiro Misono wrote:
> > FUJITSU-MONAKA Erratum E#030002 affects FUJITSU-MONAKA CPU.
> >
> > On affected FUJITSU-MONAKA CPUs, after a PMU event counter is
> > stopped at a value just before overflow, an overflow might still
> > be incorrectly detected, resulting interrupt storm in some case.
> >
> > Work around the erratum by avoiding programming PMU event counters
> > with values within five counts of overflow.
> 
> What's the user-visible behaviour of this erratum? It's not entirely clear
> to me why we need to do anything at all.

In short, this would cause a softlockup when using perf under certain conditions.
Let me explain.

The problem is that an overflow interrupt is incorrectly triggered regardless of filter settings
while the counter itself correctly counts events.
For example, if the following conditions are met:
  1) Running perf to count an event in user space only
  2) The event can also occur in kernel space
  3) The counter value is set just before the overflow (when using the -F option, initial counter value is -1)

when the kernel is about to return to user space after enabling the count,
an overflow interrupt is incorrectly triggered by an event that occurred in kernel space.
Since the counter value is not updated (correctly), the interrupt handler does nothing
and returns with the same condition. This leads to another wrong interrupt
and results in an interrupt storm and eventually a softlockup.

I will update the comments in v2.

Best Regards,
Tomohiro Misono

> 
> Will