Re: [PATCH RFC v2 08/10] ARM: dts: cortina: Add CS7542 SoC and Securifi Almond+ board

[Linus Walleij]

On Tue, Oct 6, 2026 at 8:17 PM Fil Dunsky via B4 Relay
<devnull+filipp.dunsky.gmail.com@xxxxxxxxxx> wrote:

> From: Fil Dunsky <filipp.dunsky@xxxxxxxxx>
>
> Add a minimal description of the Cortina Systems CS7542 SoC: the two
> Cortex-A9 cores, SCU, GIC, global timer, private timer and watchdog,
> PL310 L2 cache controller and the four on-chip UARTs.
>
> The peripheral clock (APB) runs at 100, 150 or 170 MHz depending on the
> boot strap pins. Until there is a driver for the global control block
> that reads the straps, model it as a fixed clock whose rate is provided
> by the board.
>
> The Securifi Almond+ is a touchscreen Wi-Fi router with 512 MiB of DDR3,
> 512 MiB of NAND flash, a QCA8337 switch, QCA9880 and AR9580 Wi-Fi and an
> ASM1042 USB 3.0 controller behind the SoC PCIe root ports. For now,
> describe the memory, the console UART and a ramoops region, and reserve
> the top 64 MiB of RAM which the vendor firmware hands to the packet
> engine queue manager.
>
> Signed-off-by: Fil Dunsky <filipp.dunsky@xxxxxxxxx>

Reviewed-by: Linus Walleij <linusw@xxxxxxxxxx>

Yours,
Linus Walleij