Re: [PATCH 3/6] alpha: clarify that _PAGE_URE and _PAGE_UWE are the Executive bits

From: Magnus Lindholm

Date: Wed Oct 07 2026 - 17:31:13 EST


Hi Matt,

On Tue, Oct 6, 2026 at 4:04 PM Matt Turner <mattst88@xxxxxxxxx> wrote:
>
> The Alpha Architecture Reference Manual defines eight protection bits in
> PTE<15:8>: KRE, ERE, SRE, URE, KWE, EWE, SWE and UWE, for Kernel,
> Executive, Supervisor and User Read and Write Enable. Linux uses only
> two of the four privilege modes, and its user processes run in Executive
> mode, so the bits it calls _PAGE_URE and _PAGE_UWE are in fact the
> architecture's ERE (bit 9) and EWE (bit 13). The true URE and UWE bits,
> 11 and 15, are unused.
>
> The names have been misleading since the beginning, and the comments on
> those defines said only "xxx". Spell out what the bits actually are. No
> functional change.
>
> Signed-off-by: Matt Turner <mattst88@xxxxxxxxx>
> ---
> arch/alpha/include/asm/pgtable.h | 16 ++++++++++++----
> 1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/arch/alpha/include/asm/pgtable.h b/arch/alpha/include/asm/pgtable.h
> index 8a175e0c2b42..d123fd0d4091 100644
> --- a/arch/alpha/include/asm/pgtable.h
> +++ b/arch/alpha/include/asm/pgtable.h
> @@ -65,10 +65,18 @@ struct vm_area_struct;
> #define _PAGE_FOW 0x0004 /* used for page protection (fault on write) */
> #define _PAGE_FOE 0x0008 /* used for page protection (fault on exec) */
> #define _PAGE_ASM 0x0010
> -#define _PAGE_KRE 0x0100 /* xxx - see below on the "accessed" bit */
> -#define _PAGE_URE 0x0200 /* xxx */
> -#define _PAGE_KWE 0x1000 /* used to do the dirty bit in software */
> -#define _PAGE_UWE 0x2000 /* used to do the dirty bit in software */
> +/*
> + * The Alpha AXP ARM defines 8 protection bits in PTE[15:8]: KRE, ERE, SRE,
> + * URE, KWE, EWE, SWE, UWE (Kernel/Executive/Supervisor/User Read/Write
> + * Enable). Linux only uses two privilege modes: kernel (mode 0) and user.
> + * User processes run in Executive mode (mode 1), so _PAGE_URE and _PAGE_UWE
> + * correspond to the architecture's ERE (bit 9) and EWE (bit 13) bits. The
> + * true User Read/Write Enable bits (bits 11 and 15) are unused.
> + */
> +#define _PAGE_KRE 0x0100 /* Kernel Read Enable (bit 8) */
> +#define _PAGE_URE 0x0200 /* Executive Read Enable (bit 9); "user" in Linux */
> +#define _PAGE_KWE 0x1000 /* Kernel Write Enable (bit 12) */
> +#define _PAGE_UWE 0x2000 /* Executive Write Enable (bit 13); "user" in Linux */
>
> /* .. and these are ours ... */
> #define _PAGE_DIRTY 0x20000
>
> --
> 2.54.0
>

Replacing the "xxx" comments is a good idea, but these describe the
OpenVMS PTE (ARM 4th ed., Table 11-2). The ARM has a part for Linux
itself (II-C, Alpha Linux Software), whose PTE (ARM Table 22-3, the
same as the Tru64 Table 17-3 this series cites for GH) names bit 9
URE and bit 13 UWE, reserves bits 10-11 and 14-15 (SBZ), and has only
user and kernel modes (ARM 22.5.1). The Executive view comes from the
21264 PALcode loading the PTE unchanged into DTB_PTE (21264/EV67 HRM
section 6.9), whose bits 9 and 13 are the hardware's ERE and EWE (HRM
Figure 5-27; mode encodings in HRM Table 5-5). So I'd keep the names
and describe them from ARM Table 22-3, with the 21264 detail in the
changelog, maybe something like this:

#define _PAGE_KRE 0x0100 /* kernel read enable, in __ACCESS_BITS */
#define _PAGE_URE 0x0200 /* user read enable, in __ACCESS_BITS */
#define _PAGE_KWE 0x1000 /* kernel write enable, in __DIRTY_BITS */
#define _PAGE_UWE 0x2000 /* user write enable, in __DIRTY_BITS */

Magnus