[PATCH RFC v6 5/5] iommu/arm-smmu-v3: Wire up shared-SID STE ordering and feature gating
From: Peng Fan (OSS)
Date: Sun Oct 11 2026 - 07:29:12 EST
From: Peng Fan <peng.fan@xxxxxxx>
For shared SIDs, only the first master to attach writes the STE
(tracked by ste_installed under streams_mutex); subsequent masters
skip the write. On teardown, skip the ABORT STE write while other
masters still share the SID, and reset ste_installed so the next
domain attach cycle re-writes the STE.
Fault events on shared SIDs cannot be attributed to a specific
master, so arm_smmu_find_master() returns NULL when the stream's
shared_masters list is non-empty.
Disable SVA, IOPF/stall, and vSMMU nesting for shared-SID masters
since all three require unambiguous SID-to-device mapping. Clear
stall_enabled for both the new master and the existing first master
when sharing is detected in arm_smmu_insert_master(), so the STE
is never programmed with the stall bit. This prevents
unrecoverable bus lockups since CMD_RESUME cannot be issued without
a unique SID-to-device mapping.
Assisted-by: LLM
Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
---
.../iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 2 +-
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 3 ++
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 60 +++++++++++++++++-----
3 files changed, 52 insertions(+), 13 deletions(-)
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
index 853276dd54536..cccc42b13d89e 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c
@@ -310,7 +310,7 @@ static int arm_vsmmu_vdevice_init(struct iommufd_vdevice *vdev)
* arm_vsmmu_vsid_to_sid() maps a vSID to master->streams[0] alone, so
* more streams would leave the rest stale and none reads out of bounds.
*/
- if (master->num_streams != 1)
+ if (master->num_streams != 1 || !list_empty(&master->shared_masters_elm))
return -EOPNOTSUPP;
return 0;
}
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
index faeec656da9e7..46d24f8eac830 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
@@ -281,6 +281,9 @@ static int arm_smmu_sva_set_dev_pasid(struct iommu_domain *domain,
if (!(master->smmu->features & ARM_SMMU_FEAT_SVA))
return -EOPNOTSUPP;
+ if (!list_empty(&master->shared_masters_elm))
+ return -EOPNOTSUPP;
+
/* Prevent arm_smmu_mm_release from being called while we are attaching */
if (!mmget_not_zero(domain->mm))
return -EINVAL;
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 328d580935b96..d56fe512382dc 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -3154,11 +3154,38 @@ arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid)
}
}
+static bool arm_smmu_is_shared_sid(struct arm_smmu_master *master)
+{
+ return !list_empty(&master->shared_masters_elm);
+}
+
+static bool arm_smmu_skip_shared_ste(struct arm_smmu_device *smmu,
+ u32 sid, bool is_abort)
+{
+ struct arm_smmu_stream *stream;
+
+ lockdep_assert_held(&smmu->streams_mutex);
+
+ stream = arm_smmu_find_stream(smmu, sid);
+ if (!stream || list_empty(&stream->shared_masters))
+ return false;
+
+ if (is_abort) {
+ stream->ste_installed = false;
+ return true;
+ }
+ if (stream->ste_installed)
+ return true;
+ stream->ste_installed = true;
+ return false;
+}
+
void arm_smmu_install_ste_for_dev(struct arm_smmu_master *master,
const struct arm_smmu_ste *target)
{
- int i, j;
+ int i;
struct arm_smmu_device *smmu = master->smmu;
+ bool is_abort;
master->cd_table.in_ste =
FIELD_GET(STRTAB_STE_0_CFG, le64_to_cpu(target->data[0])) ==
@@ -3167,18 +3194,23 @@ void arm_smmu_install_ste_for_dev(struct arm_smmu_master *master,
FIELD_GET(STRTAB_STE_1_EATS, le64_to_cpu(target->data[1])) ==
STRTAB_STE_1_EATS_TRANS;
+ is_abort = FIELD_GET(STRTAB_STE_0_CFG, le64_to_cpu(target->data[0])) ==
+ STRTAB_STE_0_CFG_ABORT;
+
for (i = 0; i < master->num_streams; ++i) {
u32 sid = master->streams[i]->id;
- struct arm_smmu_ste *step =
- arm_smmu_get_step_for_sid(smmu, sid);
+ struct arm_smmu_ste *step;
- /* Bridged PCI devices may end up with duplicated IDs */
- for (j = 0; j < i; j++)
- if (master->streams[j]->id == sid)
- break;
- if (j < i)
- continue;
+ if (arm_smmu_is_shared_sid(master)) {
+ mutex_lock(&smmu->streams_mutex);
+ if (arm_smmu_skip_shared_ste(smmu, sid, is_abort)) {
+ mutex_unlock(&smmu->streams_mutex);
+ continue;
+ }
+ mutex_unlock(&smmu->streams_mutex);
+ }
+ step = arm_smmu_get_step_for_sid(smmu, sid);
arm_smmu_write_ste(master, sid, step, target);
}
}
@@ -3326,8 +3358,7 @@ static int arm_smmu_enable_iopf(struct arm_smmu_master *master,
if (!master->stall_enabled)
return 0;
- /* We're not keeping track of SIDs in fault events */
- if (master->num_streams != 1)
+ if (master->num_streams != 1 || arm_smmu_is_shared_sid(master))
return -EOPNOTSUPP;
if (master->iopf_refcount) {
@@ -4360,9 +4391,11 @@ static int arm_smmu_insert_master(struct arm_smmu_device *smmu,
break;
}
- if (list_empty(&stream->shared_masters))
+ if (list_empty(&stream->shared_masters)) {
list_add_tail(&stream->master->shared_masters_elm,
&stream->shared_masters);
+ stream->master->stall_enabled = false;
+ }
list_add_tail(&master->shared_masters_elm,
&stream->shared_masters);
master->streams[n++] = stream;
@@ -4522,6 +4555,9 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev)
smmu->features & ARM_SMMU_FEAT_STALL_FORCE)
master->stall_enabled = true;
+ if (arm_smmu_is_shared_sid(master))
+ master->stall_enabled = false;
+
ret = arm_smmu_master_prepare_ats(master);
if (ret)
goto err_disable_pasid;
--
2.34.1