[tip: locking/core] irq: Explain better on NMI_MASK overflow condition
From: tip-bot2 for Boqun Feng
Date: Mon Oct 12 2026 - 09:48:55 EST
The following commit has been merged into the locking/core branch of tip:
Commit-ID: 1259028ec8f2a788cf560b40efca2c1fa74da89c
Gitweb: https://git.kernel.org/tip/1259028ec8f2a788cf560b40efca2c1fa74da89c
Author: Boqun Feng <boqun@xxxxxxxxxx>
AuthorDate: Thu, 01 Oct 2026 10:25:18 +02:00
Committer: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
CommitterDate: Fri, 02 Oct 2026 11:47:14 +02:00
irq: Explain better on NMI_MASK overflow condition
Currently __preempt_count_nmi_enter() uses 15 as the maximum NMI nesting
level, and it's because 4 bits are used to represent the nesting level
of NMI. Replace the tautological comment with a more direct mention to
the 4 bits limitation to help readers understand this condition.
Suggested-by: Shrikanth Hegde <sshegde@xxxxxxxxxxxxx>
Signed-off-by: Boqun Feng <boqun@xxxxxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Reviewed-by: Shrikanth Hegde <sshegde@xxxxxxxxxxxxx>
Link: https://patch.msgid.link/20261001082519.16195-5-boqun@xxxxxxxxxx
---
include/linux/hardirq.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h
index 73b48dd..2648c49 100644
--- a/include/linux/hardirq.h
+++ b/include/linux/hardirq.h
@@ -108,7 +108,7 @@ DECLARE_PER_CPU(unsigned int, nmi_nesting);
#define __preempt_count_nmi_enter() \
do { \
__preempt_count_add(HARDIRQ_OFFSET); \
- /* Maximum NMI nesting is 15. */ \
+ /* NMI nesting is represented in 4 bits. */ \
BUG_ON(__this_cpu_read(nmi_nesting) >= 15); \
__this_cpu_inc(nmi_nesting); \
preempt_count_set(preempt_count() | NMI_MASK); \