[PATCH v2 6/7] media: ipu-bridge: Add the GC5035 binning link frequency

[Nicola Fiorillo]

In its 2x2 binned mode the GC5035 uses a 175.2 MHz link frequency, set by
the PLL of the vendor register sequence for that mode. List it, so that
the driver can offer binning.

Assisted-by: claude-opus-5-5
Signed-off-by: Nicola Fiorillo <nicfio@xxxxxxxxx>
---
 drivers/media/pci/intel/ipu-bridge.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/pci/intel/ipu-bridge.c b/drivers/media/pci/intel/ipu-bridge.c
index 851096d7d..3caa07529 100644
--- a/drivers/media/pci/intel/ipu-bridge.c
+++ b/drivers/media/pci/intel/ipu-bridge.c
@@ -60,7 +60,7 @@ static const u16 ipu6_ov5693_ncont_clk[] = {
 
 static const struct ipu_sensor_config ipu_supported_sensors[] = {
 	/* GalaxyCore GC5035 */
-	IPU_SENSOR_CONFIG("GCTI5035", 1, 422400000),
+	IPU_SENSOR_CONFIG("GCTI5035", 2, 175200000, 422400000),
 	/* GalaxyCore GC8034 */
 	IPU_SENSOR_CONFIG("GCTI8034", 1, 268800000),
 	/* Himax HM1092 */
-- 
2.47.3