Re: [net-next,PATCH v2] enetc: Increase eMDIO MDC rate to 2.5 MHz
From: Marek Vasut
Date: Mon Oct 12 2026 - 13:05:55 EST
On 10/8/26 4:34 AM, Wei Fang wrote:
Is there maybe any other clock source that might feed the MDC clock on MX95 B0, that could explain the 558 kHz I observe ?Clark helped measure the MDC rate on the 95 EVK board this morning,
and the result was 644KHz, which is consistent with the theoretical
value. The scope's accuracy or other factors may be causing you to
observe a rate of 558kHz.
That 644 kHz and 558 kHz differs too much to be an equipment
miscalibration / misuse.
For the sake of completeness, the MX95 B0 I have on my desk now prints this in
SM:
>$ clock.r
...
097: busnetcmix = on, 133333333Hz
098: enet = on, 666666666Hz
099: enetphytest200m = on, 24000000Hz
100: enetphytest500m = on, 24000000Hz
101: enetphytest667m = on, 24000000Hz
102: enetref = on, 250000000Hz
103: enettimer1 = on, 24000000Hz
And the cycle time of MDC is 1.8ms , which is some 550 kHz .
The enet clock is the source of NETC system clock, and there is a 1/2
divisor inside the NETCMIX, so the NETC system clock is 333 MHz.
So the MDC clock should be 644 KHz, the frequency measured by
Clark in the attachment is indeed 644kHz.
I apologize for my late reply, I am currently catching up on email.
Thank you for your help !