Re: [PATCH] KVM: x86/mmu: Cope with the SS bit being set in #NPF exit codes

[Sean Christopherson]

On Mon, Oct 12, 2026, Paolo Bonzini wrote:
> On Mon, Oct 12, 2026 at 6:38 PM Sean Christopherson <seanjc@xxxxxxxxxx> wrote:
> >
> > On Fri, Oct 09, 2026, Paolo Bonzini wrote:
> > > When running Hyper-V from Windows 11, KVM is seeing the SS bit set
> > > in nested page fault error codes produced for shadowed NPT.  The AMD
> > > manual is unclear about when SS is set, including whether it can be set
> > > when SupervisorShadowStackEn (bit 6) is not set in the MISC_CTL field
> > > of the VMCB; in fact, bisection shows that while SHSTK was available
> > > to guests since Linux 6.18, this started happening with commit
> > > 687ee95c1b6d ("KVM: nSVM: enable GMET for guests"), which seems unrelated.
> >
> > It's not unrelated.  As you note below, this is purely because Hyper-V only uses
> > CET when GMET is available.
> 
> Indeed, my intended meaning is that bit 1 of MISC_CTL does *not* have
> the side effect of reporting SS failures...
> 
> > This is wrong, I reproduced this with the KUT CET test with gmet=1.
> 
> ... howver, this makes me wonder if you meant gmet=0? Because if you
> need gmet=1, the Fixes would be fe080f58dec24049 (i.e. when the gmet
> module parameter was added).

/facepalm

I did indeed.  And I quadruple-checked that I could trigger the splat with gmet=0.