Re: [PATCH v4 1/2] arm64: dts: qcom: shikra-iqs-evk: Add LT9611UXD HDMI bridge support

[Mohit Dsor]

On Wed, Oct 07, 2026 at 04:40:26PM +0300, Dmitry Baryshkov wrote:
> On Wed, Oct 07, 2026 at 06:21:06PM +0530, Mohit Dsor wrote:
> > Enable the Shikra MDSS display subsystem on the Qualcomm Shikra IQS
> > EVK board and add the Lontium LT9611UXD DSI-to-HDMI bridge node.
> > 
> > The LT9611UXD is connected via I2C (bus 4, address 0x41), powered by
> > a GPIO-controlled 3.3V regulator (PM8150 GPIO4) and an always-on 1.8V
> > rail. Reset is on GPIO76 and interrupt on GPIO85.
> > 
> > The bridge receives DSI output from MDSS and drives an HDMI-A
> > connector, with the link wired as: DPU -> DSI0 -> LT9611UXD -> HDMI.
> > 
> > Regulator and pinctrl labels use generic board-level names
> > (vreg_disp_3p3, bridge_irq_pin, bridge_rst_pin) to decouple them
> > from the bridge chip.
> > 
> > Signed-off-by: Mohit Dsor <mohit.dsor@xxxxxxxxxxxxxxxx>
> > ---
> >  arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts | 109 ++++++++++++++++++++++++++++
> >  1 file changed, 109 insertions(+)
> > 
> > +
> > +&i2c4 {
> > +	status = "okay";
> > +
> > +	lt9611uxd: lt9611uxd@41 {
> 
> unused label. rename the node to hdmi-bridge
The label will be required in overlays on top of HDMI so shall we remove it now or add in overlay series ?
> 
> > +		compatible = "lontium,lt9611uxd";
> > +		reg = <0x41>;
> > +		interrupts-extended = <&tlmm 85 IRQ_TYPE_EDGE_FALLING>;
> > +		reset-gpios = <&tlmm 76 GPIO_ACTIVE_LOW>;
> > +		vcc-supply = <&vreg_disp_3p3>;
> > +		vdd-supply = <&pm8150_s4>;
> > +
> > +		pinctrl-0 = <&bridge_irq_pin &bridge_rst_pin>;
> > +		pinctrl-names = "default";
> > +
> > +		ports {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +
> > +			port@0 {
> > +				reg = <0>;
> > +
> > +				lt9611_a: endpoint {
> > +					remote-endpoint = <&mdss_dsi0_out>;
> > +				};
> > +			};
> > +
> > +			port@2 {
> > +				reg = <2>;
> > +
> > +				lt9611_out: endpoint {
> > +					remote-endpoint = <&hdmi_con>;
> 
> hdmi_connector_out
Will fix it in next version.
> 
> > +				};
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > @@ -67,6 +160,22 @@ &sdhc_2 {
> >  	status = "okay";
> >  };
> >  
> > +&tlmm {
> > +	bridge_irq_pin: bridge-irq-state {
> > +		pins = "gpio85";
> > +		function = "gpio";
> > +		drive-strength = <2>;
> > +		bias-disable;
> > +	};
> > +
> > +	bridge_rst_pin: bridge-rst-state {
> 
> I think the current recommendation is to sort them by the pin number.
Sure, will sort it accordingly.
> 
> > +		pins = "gpio76";
> > +		function = "gpio";
> > +		drive-strength = <8>;
> > +		bias-disable;
> > +	};
> > +};
> > +
> >  &usb_1_hsphy {
> >  	vdd-supply = <&pm8150_l4>;
> >  	vdda-pll-supply = <&pm8150_l12>;
> > 
> > -- 
> > 2.34.1
> > 
> 
> -- 
> With best wishes
> Dmitry