Re: [PATCH spi-next 3/3] spi: spi-fsl-lpspi: cache content of Interrupt Enable Register (IER)

[Frank Li]

On Fri, Oct 09, 2026 at 12:16:37PM +0200, Marc Kleine-Budde wrote:
> To improve performance avoid reading the Interrupt Enable Register (IER)
> from the hardware, cache in struct fsl_lpspi_data::reg_ier.

Do you have bench mark data? I am not sure how much gain by only avoid
a register read.

Frank

>
> Introduce struct fsl_lpspi_data::reg_ier, to cache the current value.
> Extend fsl_lpspi_intctrl() to update the cache and replace the open coded
> writing of the IRQ register in fsl_lpspi_prepare_message() with
> fsl_lpspi_intctrl().
>
> In fsl_lpspi_isr() don't read the IER from the hardware, but use the cached
> value from struct fsl_lpspi_data::reg_ier.
>
> Signed-off-by: Marc Kleine-Budde <mkl@xxxxxxxxxxxxxx>
> ---
>  drivers/spi/spi-fsl-lpspi.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c
> index b25f94b2ef73..5b158b0cb5af 100644
> --- a/drivers/spi/spi-fsl-lpspi.c
> +++ b/drivers/spi/spi-fsl-lpspi.c
> @@ -122,6 +122,7 @@ struct fsl_lpspi_data {
>  	void (*rx)(struct fsl_lpspi_data *fsl_lpspi);
>
>  	u32 remain;
> +	u32 reg_ier;
>  	u8 watermark;
>  	u8 txfifosize;
>  	u8 rxfifosize;
> @@ -199,6 +200,7 @@ LPSPI_BUF_TX(u32)
>  static void fsl_lpspi_intctrl(struct fsl_lpspi_data *fsl_lpspi,
>  			      unsigned int enable)
>  {
> +	fsl_lpspi->reg_ier = enable;
>  	writel(enable, fsl_lpspi->base + IMX7ULP_IER);
>  }
>
> @@ -525,7 +527,7 @@ static int fsl_lpspi_prepare_message(struct spi_controller *controller,
>  	fsl_lpspi_set_cmd(fsl_lpspi);
>
>  	/* No IRQs */
> -	writel(0, fsl_lpspi->base + IMX7ULP_IER);
> +	fsl_lpspi_intctrl(fsl_lpspi, 0);
>
>  	/* Controller disable, clear FIFOs, clear status */
>  	writel(CR_RRF | CR_RTF, fsl_lpspi->base + IMX7ULP_CR);
> @@ -808,7 +810,7 @@ static irqreturn_t fsl_lpspi_isr(int irq, void *dev_id)
>  	u32 temp_SR, temp_IER;
>  	struct fsl_lpspi_data *fsl_lpspi = dev_id;
>
> -	temp_IER = readl(fsl_lpspi->base + IMX7ULP_IER);
> +	temp_IER = fsl_lpspi->reg_ier;
>  	fsl_lpspi_intctrl(fsl_lpspi, 0);
>  	temp_SR = readl(fsl_lpspi->base + IMX7ULP_SR);
>
>
> --
> 2.53.0
>
>