Re: [PATCH] PCI: Avoid D3 on PLX PEX 8532/8533/8548 downstream ports

[Florian Fainelli]

On 10/12/26 14:34, Bjorn Helgaas wrote:
> [+cc several Broadcom folks, help with possible switch erratum]
>
> On Sun, Sep 27, 2026 at 12:56:09PM +0200, Imre Kaloz wrote:
> > Runtime PM suspends an idle downstream port of a PLX/Broadcom PEX
> > 8532/8533/8548 switch to D3hot, but that takes the whole switch down
> > with it: any device behind another port of the same switch then
> > faults with a fatal bus error on its next access, e.g. mptsas probe
> > on a Sun Ultra 45.
> >
> > This surfaced on sparc64 once commit a5fb3ff63287 ("PCI: Allow PCI
> > bridges to go to D3Hot on all non-x86") let bridges enter D3hot. Keep
> > these downstream ports out of D3 by setting PCI_DEV_FLAGS_NO_D3.
>
> I don't really have any objection to this, but I am concerned that
> this quirk only applies to a few specific devices, but
> https://admin.pci-ids.ucw.cz/read/PC/10b5 shows a TON of
> similar-looking switches that I assume have the same behavior, so
> this may be just the tip of the iceberg.
>
> > Fixes: a5fb3ff63287 ("PCI: Allow PCI bridges to go to D3Hot on all non-x86")
> > Cc: stable@xxxxxxxxxxxxxxx
> > Signed-off-by: Imre Kaloz <kaloz@xxxxxxxxxx>

Our internal portal does not have any document for the 8532/8533/8548 so 
unfortunately I cannot help here with identifying an errata document.
--
Florian