Re: [PATCH v4 1/3] x86/resctrl: Fix ABMC counter programming

[Moger, Babu]

Hi Reinette,

Thanks for quick review.

On 10/12/2026 1:40 PM, Reinette Chatre wrote:
> Hi Babu,
>
> On 10/9/26 4:44 PM, Babu Moger wrote:
> > AMD's Assignable Bandwidth Monitoring Counters (ABMC) are configured via
> > MSR_IA32_L3_QOS_ABMC_CFG; MSR_IA32_L3_QOS_ABMC_CFG.cntr_id selects the
> > counter the configuration applies to. The number of counters a platform
> > supports (the number of possible values written to
> > MSR_IA32_L3_QOS_ABMC_CFG.cntr_id) is enumerated separately via CPUID.
> >
> > On platforms that enumerate more than 32 counters, the current 5-bit
> > encoding truncates the counter ID and misprograms ABMC.
> >
> > The AMD64 Architecture Programmer's Manual [1], available from [2], has
> > been updated to widen MSR_IA32_L3_QOS_ABMC_CFG.cntr_id from 5 bits to 12
> > bits (the published revision 3.41 does not yet reflect this; a future
> > revision will). The CPUID enumeration reports the maximum counter ID in a
> > 16-bit field and may therefore report more counters than a 12-bit
> > MSR_IA32_L3_QOS_ABMC_CFG.cntr_id can address.
> >
> > Widen MSR_IA32_L3_QOS_ABMC_CFG.cntr_id to 12 bits to match the
> > architecture. Cap the enumerated counter count at BIT(12) so every counter
> > ID used by resctrl can be written to MSR_IA32_L3_QOS_ABMC_CFG.cntr_id
> > without truncation.
> >
> > [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming,
> >      Publication #24593, Revision 3.41, Section 19.3.3.3 "Assignable
> >      Bandwidth Monitoring (ABMC)"
> >
> > Fixes: 84ecefb76674 ("x86/resctrl: Add data structures and definitions for ABMC assignment")
> > Signed-off-by: Babu Moger <babu.moger@xxxxxxx>
> > Cc: stable@xxxxxxxxxxxxxxx
> > Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 # [2]
> > ---
>
> Reviewed-by: Reinette Chatre <reinette.chatre@xxxxxxxxx>

Thanks
Babu