RE: [PATCH rtw-next] wifi: rtl8xxxu: isolate the USB register buffer from CPU state

[Ping-Ke Shih]

Kim Wooseok <5mghybrid@xxxxxxxxx> wrote:
> 
> For example, suppose the buffer initially contains 10:
> 
> 1. Task A holds usb_buf_mutex and starts a USB register read.
> 2. Task B tries to acquire the same mutex and joins its wait list.
>    This can bring the shared cache line into the CPU cache, including
>    the old buffer value 10. Updating the list makes that line dirty.
> 3. The USB controller writes the new value 20 to RAM via DMA. Since
>    this DMA is not cache-coherent, the cached copy still contains 10.
> 4. If the dirty cache line is then written back, the old buffer value
>    10 can be written back along with the updated wait list, overwriting
>    the value 20 from DMA.

Thanks for the detail and this example, which is clear to me. :)

Ping-Ke