Re: [PATCH v2 1/3] clk: socfpga: agilex: register the SP timer clocks early

From: NG, ADRIAN HO YIN

Date: Tue Oct 13 2026 - 02:22:54 EST



On 10/13/2026 5:53 AM, Dinh Nguyen wrote:


On 10/2/26 05:22, Adrian Ng Ho Yin wrote:
The DW APB timers are probed through TIMER_OF_DECLARE() from time_init()
and cannot defer, but the clock manager is a platform driver registered
at core_initcall(). The timer's clk_get() therefore fails and the timer
is never brought up.

Register only l4_sp_clk and its parents (boot_clk, main_pll, periph_pll,
main_pll_c1, peri_pll_c1 and noc_free_clk) from of_clk_init() using
CLK_OF_DECLARE_DRIVER(), with every other clock left as -EPROBE_DEFER.
The remaining clocks are still registered when the platform driver
probes, which reuses the early provider.

Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@xxxxxxxxxx>
---
  drivers/clk/socfpga/clk-agilex.c | 222 +++++++++++++++++++++++--------
  1 file changed, 169 insertions(+), 53 deletions(-)

diff --git a/drivers/clk/socfpga/clk-agilex.c b/drivers/clk/socfpga/clk-agilex.c
index 2bdea1997b5e..91a80b7b1886 100644
--- a/drivers/clk/socfpga/clk-agilex.c
+++ b/drivers/clk/socfpga/clk-agilex.c
@@ -4,7 +4,9 @@
   */
  #include <linux/slab.h>
  #include <linux/clk-provider.h>
+#include <linux/io.h>

WHy do you need this include? Comment applies to all 3 patches.
The rest looks good to me.

Hi Dinh,

Thanks for the review.
The include line was left over from the v1 submission. I'll drop it in V3.

Thank You

Adrian


Dinh