Re:Re: [PATCH 7/7] gpio: pl061: add Ambarella register-layout variant

[zl020895]

Hi Andy,

You did give Reviewed-by earlier. After that
tag the commit gained the DAT cache, so I dropped the tag because the
code changed. If you are still fine with that version, I will restore
it.

Thanks for the review.

Best regards,
Long Zhao

At 2026-10-13 15:17:01, "Andy Shevchenko" <andriy.shevchenko@xxxxxxxxxxxxxxx> wrote:
>On Fri, Oct 09, 2026 at 06:58:00PM +0800, Long Zhao via B4 Relay wrote:
>
>> Add a 32-bit, 32-line layout with DAT/DIR/IS/IBE/IEV/IE/MIS/IC plus
>> MASK and ENABLE. Probe unmasks the bank and enables the controller.
>> IRQ type changes also clear the pending bit. This derivative does not
>> need write-after-direction or system suspend save/restore.
>> 
>> Cache DAT (REGCACHE_FLAT_S, not volatile) so gpio_set() updates one
>> bit from the output shadow instead of read-modify-writing the pin
>> level across the bank.
>> 
>> Match the part with designer AMBA_VENDOR_AMBARELLA (JEP106 identity
>> 0x68, bit 7 set) and part number 0x061.
>
>Ick?! I thought I gave a tag for this. What's going on?
>
>-- 
>With Best Regards,
>Andy Shevchenko
>