[PATCH 4/9] ASoC: SOF: amd: add ACP7.B chip descriptor and wire per-revision probe

From: Vijendar Mukunda

Date: Tue Oct 13 2026 - 15:10:42 EST


Add acp7b_chip_info, acp7b_desc and acp7b_pci_id for ACP7.B platforms.
Extend acp7x_pci_probe() to select acp7b_desc for ACP7B_PCI_ID revisions
alongside the existing acp7f_desc path.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@xxxxxxx>
---
sound/soc/sof/amd/pci-acp7x.c | 49 +++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)

diff --git a/sound/soc/sof/amd/pci-acp7x.c b/sound/soc/sof/amd/pci-acp7x.c
index 7261377c615b7..5a21ab8ebb4b9 100644
--- a/sound/soc/sof/amd/pci-acp7x.c
+++ b/sound/soc/sof/amd/pci-acp7x.c
@@ -26,6 +26,48 @@
#define ACP7X_REG_START 0x1240000
#define ACP7X_REG_END 0x125C000

+static const struct sof_amd_acp_desc acp7b_chip_info = {
+ .name = "acp7b",
+ .pgfsm_base = ACP7X_PGFSM_BASE,
+ .ext_intr_enb = ACP6X_EXTERNAL_INTR_ENB,
+ .ext_intr_cntl = ACP7X_EXTERNAL_INTR_CNTL,
+ .ext_intr_stat = ACP7X_EXT_INTR_STAT,
+ .ext_intr_stat1 = ACP7X_EXT_INTR_STAT1,
+ .dsp_intr_base = ACP7X_DSP_SW_INTR_BASE,
+ .acp_error_stat = ACP7X_ERROR_STATUS,
+ .sram_pte_offset = ACP7X_SRAM_PTE_OFFSET,
+ .hw_semaphore_offset = ACP7X_AXI2DAGB_SEM_0,
+ .fusion_dsp_offset = ACP7X_DSP_FUSION_RUNSTALL,
+ .probe_reg_offset = ACP7X_FUTURE_REG_ACLK_0,
+ .reg_start_addr = ACP7X_REG_START,
+ .sdw_max_link_count = ACP7X_SDW_MAX_MANAGER_COUNT,
+ .sdw_acpi_dev_addr = SDW_ACPI_ADDR_ACP7X,
+ .reg_end_addr = ACP7X_REG_END,
+};
+
+static const struct sof_dev_desc acp7b_desc = {
+ .machines = snd_soc_acpi_amd_acp7b_sof_machines,
+ .resindex_lpe_base = 0,
+ .resindex_pcicfg_base = -1,
+ .resindex_imr_base = -1,
+ .irqindex_host_ipc = -1,
+ .chip_info = &acp7b_chip_info,
+ .ipc_supported_mask = BIT(SOF_IPC_TYPE_3),
+ .ipc_default = SOF_IPC_TYPE_3,
+ .default_fw_path = {
+ [SOF_IPC_TYPE_3] = "amd/sof",
+ },
+ .default_tplg_path = {
+ [SOF_IPC_TYPE_3] = "amd/sof-tplg",
+ },
+ .default_fw_filename = {
+ [SOF_IPC_TYPE_3] = "sof-acp7b.ri",
+ },
+ .nocodec_tplg_filename = "sof-acp.tplg",
+ .ops = &sof_acp7x_ops,
+ .ops_init = sof_acp7x_ops_init,
+};
+
static const struct sof_amd_acp_desc acp7f_chip_info = {
.name = "acp7f",
.pgfsm_base = ACP7X_PGFSM_BASE,
@@ -68,6 +110,11 @@ static const struct sof_dev_desc acp7f_desc = {
.ops_init = sof_acp7x_ops_init,
};

+static const struct pci_device_id acp7b_pci_id = {
+ PCI_DEVICE(PCI_VENDOR_ID_AMD, ACP_PCI_DEV_ID),
+ .driver_data = (unsigned long)&acp7b_desc,
+};
+
static const struct pci_device_id acp7f_pci_id = {
PCI_DEVICE(PCI_VENDOR_ID_AMD, ACP_PCI_DEV_ID),
.driver_data = (unsigned long)&acp7f_desc,
@@ -82,6 +129,8 @@ static int acp7x_pci_probe(struct pci_dev *pci, const struct pci_device_id *pci_
return -ENODEV;

switch (pci->revision) {
+ case ACP7B_PCI_ID:
+ return sof_pci_probe(pci, &acp7b_pci_id);
case ACP7F_PCI_ID:
return sof_pci_probe(pci, &acp7f_pci_id);
default:
--
2.48.1