[PATCH 1/3] dt-bindings: nvmem: Add SG2044 eFuse controller

From: Inochi Amaoto

Date: Wed Oct 14 2026 - 03:56:26 EST


Sophgo SG2044 uses eFuses used to store factory-programmed data
such as ROM patch, public keys and other factory information.

Signed-off-by: Inochi Amaoto <inochiama@xxxxxxxxx>
---
.../bindings/nvmem/sophgo,efuse.yaml | 61 +++++++++++++++++++
1 file changed, 61 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml

diff --git a/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml
new file mode 100644
index 000000000000..d4bffe2724ac
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/sophgo,efuse.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo SoC eFuse-based NVMEM
+
+description:
+ Sophgo SoCs contain factory-programmed eFuses used to store ROM patch,
+ public key and other factory information.
+
+maintainers:
+ - Inochi Amaoto <inochiama@xxxxxxxxx>
+
+allOf:
+ - $ref: nvmem.yaml#
+
+properties:
+ compatible:
+ enum:
+ - sophgo,sg2044-efuse
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ items:
+ - description: Core clock
+ - description: APB clock
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: core
+ - const: apb
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ efuse@40000000 {
+ compatible = "sophgo,sg2044-efuse";
+ reg = <0x40000000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&clk 0>,
+ <&clk 1>;
+ clock-names = "core", "apb";
+ };
+
+...
--
2.56.0