Re: [PATCH 1/3] dt-bindings: iio: adc: add bindings for stm32 mdf filter
From: Olivier MOYSAN
Date: Wed Oct 14 2026 - 13:05:33 EST
On 10/14/26 17:15, Conor Dooley wrote:
On Mon, Oct 12, 2026 at 02:56:04PM +0200, Olivier MOYSAN wrote:
Hi Conor,
On 10/9/26 21:12, Conor Dooley wrote:
On Thu, Oct 08, 2026 at 06:37:26PM +0200, Olivier MOYSAN wrote:
Hi Conor,
On 10/8/26 12:11, Conor Dooley wrote:
On Wed, Oct 07, 2026 at 11:01:28AM +0200, Olivier MOYSAN wrote:
Hi Conor,
Thanks for the review
On 10/1/26 20:32, Conor Dooley wrote:
On Thu, Oct 01, 2026 at 04:56:45PM +0200, Olivier Moysan wrote:
Add bindings that describes STM32 MDF settings to support
digital filtering for Pulse Density Modulation (PDM) microphones
and analog sigma delta modulators.
Signed-off-by: Olivier Moysan <olivier.moysan@xxxxxxxxxxx>
---
.../bindings/iio/adc/st,stm32-mdf-adc.yaml | 383 ++++++++++++++++++
1 file changed, 383 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/adc/st,stm32-mdf-adc.yaml
diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-mdf-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-mdf-adc.yaml
new file mode 100644
index 000000000000..f2fbc3e150e8
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-mdf-adc.yaml
@@ -0,0 +1,383 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/st,stm32-mdf-adc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32 Multi-function Digital Filter (MDF) ADC
+
+maintainers:
+ - Olivier Moysan <olivier.moysan@xxxxxxxxxxx>
+
+description: |
+ STM32 MDF ADC is a sigma delta analog-to-digital converter dedicated to
+ interface external sigma delta modulators to STM32 micro controllers.
+
+properties:
+ compatible:
+ enum:
+ - st,stm32mp25-mdf
+ - st,stm32mp23-mdf
+
+ reg:
+ minItems: 1
+ maxItems: 2
This needs an items list here. The size of the regions seems like crap
to begin with...
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ description: Internal clock used for MDF digital processing.
+ items:
+ - const: ker_ck
This is pointless when you only have one.
I agree that it could be dropped. However, it is useful for using
devm_regmap_init_mmio_clk.
Ah, because that function if you pass NULL to it, it doesn't mean no
string, it means no clock.
The MDF has two clocks (AHB clock for register accesses and ker_ck for
peripheral processing). However, these two clocks share the same gate. So,
only the ker_ck clock is exposed in the driver.
That's incorrect, you should have two clocks in DT if the block has two
even if they have a shared gate.
This would not be consistent with the architectural choice made for the
STM32MP25. The RCC driver provides an abstraction to manage these two clocks
as one, since they are controlled by the same gate. The binding incorporates
this abstraction to manage only a single clock.
A large number of peripherals on STM32MP25 have the same architecture and
follow this implementation rule. So managing both clocks in the MDF driver
would create a consistency issue with the other peripherals.
Doesn't really matter how you've modelled the clock controller, cos you
can just have the same clock be both inputs, and retain a correct model
of this hardware?
The regmap api is a convenient way to manage registers and gate the AHB
clock only on register accesses. Removing clock-names no longer allows you
to benefit from clock management handled by the regmap framework, and means
that this must be managed explicitly, partially or entirely, in the driver.
+
+ "#clock-cells":
+ enum: [0, 1]
Why is this not fixed? Also why are parts of your own device consuming
the clocks?
Reading the docs, this has to be 1, you have two clocks?
Not sure why you skipped this and skipped explaining why you are
consuming your own clocks.
Yes, we can have two clocks gated independently but sharing the same rate.
Using the clock framework apis seemed to me the right way to manage cck1 and
cck0 gating and divider computing. I think I would have to introduce
proprietary properties and have to implement code in the driver, that would
be handled natively by the framework otherwise.
The CCF is still the right way to do it, especially since CCK0/1 can be
exported to other devices. I don't believe you need to actually have a
reference in DT to do this though, plenty of "real" clock controllers
have only one input clock and hang a whole tree with multiple layers off
that.
Down below I mentioned this under "ouroboros devices", I think this kind
of ability to chose which clock a channel uses is a fairly normal thing
to do in IIO land, I just dunno what the preferred mechanism is - I just
know that it is not referencing yourself (probably it's some sort of
property that you put in a channel node that says 'blah-clock = "cck0"',
but better that the IIO folks answer.
The adc.yaml binding do not expose clock properties. But maybe IIO experts
can answer about this.
+ clock-output-names:
+ description: |
+ CCK0 and CCK1 are optional output clocks, which share the same clock frequency,
+ but can be gated independently to save power.
+ minItems: 1
+ maxItems: 2
+ oneOf:
+ - items:
+ - const: cck0
+ - items:
+ - const: cck1
+ - items:
+ - const: cck0
+ - const: cck1
+
+ clock-frequency:
+ description: |
+ Common clock frequency (Hz) for CCK0 and CCK1 output clocks.
+ The frequency must be a multiple of the "ker_ck" clock frequency.
+ maximum: 25000000
Should not be needed, the consumers request what they need.
The CCKx clock frequency depends on the maximum rate supported by the sigma
delta converters (for instance a digital mic) and the expected decimation
ratio on the bitstream. Typically this determines the frequency on the SPI
bus.
This rate is defined statically and shared by the CCKx clocks. So IMHO, as
this rate is unique, it can look strange to let the consumer define it.
Moreover, it seems to me that clock-frequency is already used to configure
the frequency of a provider in some other bindings.
For instance: Documentation/devicetree/bindings/clock/silabs,si570.yaml
This is a binding from the age of antiquity, using it to justify your
use is actually harming your argument rather than helping. Your clock
consumers should be providing the information about what the rate should
be, and if you need to do this in dt you can use assigned-clock-rates.
ok, I will move this to clock consumer with assigned-clock properties.
So, it's not clear for me, what is the restriction on clock-frequency
property.
+
+ ranges: true
+
+ clock-ranges: true
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ items:
+ - const: mdf
Same applies here as to the clock names fwiw.
Yes, I removed this.
+
+ access-controllers:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: |
+ Phandle to the rifsc device to check access right.
+
+ power-domains:
+ maxItems: 1
+
+ st,interleave:
+ description: |
+ List of phandles of interleaved filters. The indexes of interleaved filters must be
+ consecutives starting from 0 (i.e in range [0..N]). The samples from interleaved filters
+ are muxed in a single channel and retrieved through the device associated to the filter 0.
+ The filters 1..N have to be enabled, but inherit their configuration from filter 0.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
No idea what these even are, but this is probably not the right way to
represent the relationship between devices. They're apparently ADCs, but
this is also an ADC so I'm not sure what's going on here at all.
Yeah, after more thought this should not be done like this at all,
especially if these filters the phandle point to are part of this device
itself, which I suspect they are. If that's the case, you don't need
phandles to even do this, you just need an int that says what N is.
Yes, can be an index as it is an internal reference. I will change this.
+
+required:
+ - compatible
+ - reg
+ - ranges
+ - clocks
+ - clock-names
+ - clock-ranges
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+patternProperties:
+ "^sitf@[0-9]+$":
+ type: object
+ description: Serial interface child node
Why is this a child node at all?
Probably not worth reviewing more without a link to the docs for this
device so I can figure out what on earth is going on!
The MDF is a digital filter for sigma-delta bitstreams, rather than the
analog-to-digital converter itself.
Here is the link to STM32MP25 reference manuel
https://www.st.com/resource/en/reference_manual/rm0457-stm32mp2325xx-advanced-armbased-3264bit-mpus-stmicroelectronics.pdf
Chapter 45: Multi-function digital filter (MDF)
On STMP32MP25 SoC, the MDF provides 8 serial interfaces (SITF) and 8 digital
filters (DFLT) which can be connected through a multiplexer.
Below is a schematic view of typical applications targeted by this
peripheral
Audio use case:
mdf
+-------------------------------------+
+------+ | +------+ +------+ +------+ |
| dmic | -> | | sitf | -> | mux | -> | dflt | -- | -> audio device
+------+ | +------+ +------+ +------+ |
+-------------------------------------+
For instance, in an audio use case the serial interface can be configured to
provide the clock to the digital microphone (cck0, cck1 or both) at a common
predefined rate, and to retrieve the PDM samples.
The serial interface provides this samples to a digital filter, which
delivers PCM samples on its output.
Analog use case:
mdf
+-------------------------------------+
+--------+ | +------+ +------+ +------+ |
| sd adc | -> | | sitf | -> | mux | -> | dflt | -- | -> iio device
+--------+ | +------+ +------+ +------+ |
+-------------------------------------+
So, looking at the docs and a brief chat with Jonathan about this
device, I believe you've got things backwards and this is actually the backend,
and the adc should be the one populating the io-backends property
pointing to this device. You should have io-backend-cells, and I assume
that there should be a cell for the adc to select which dlft it is connected
to.
There have already been lengthy discussions in the past about a DFSDM
peripheral on STM32MP1, which has features similar to those of the MDF and
similar implementation constraints. For the DFSDM, a solution based on an
IIO backend had been upstreamed. The MDF follows the same architecture. I
need to take a little time to dive back into this issue.
One thing to note there is that you retrofitted the backends onto that
device, and the original design here is much older (it's a text
binding).
DFSDM sources:
drivers/iio/adc/stm32-dfsdm-adc.c
drivers/iio/adc/stm32-dfsdm-core.c
Here is a sample of DFSDM DT
sd_adc0: simple-sd-adc0 {
compatible = "sd-modulator";
#io-backend-cells = <0>;
vref-supply = <&v3v3>;
Yeah, pretty sure this is wrong (backwards). The backend is the thing
that gets data from an ADC not the ADC.
The backend framework was introduced to implement complex IIO aggregate
devices. The hardwares that were driving this need were analog device ad9467
and ST DFSDM.
https://lore.kernel.org/linux-iio/20231204144925.4fe9922f@jic23-huawei/T/#m222f5175273b81dbfe40b7f0daffcdc67d6cb8ff
From drivers/iio/industrialio-backend.c:
"The typical architecture is to have one device as the frontend device which
can be "linked" against one or multiple backend devices. All the IIO and
userspace interface is expected to be registers/managed by the frontend
device which will callback into the backends when needed (to get/set some
configuration that it does not directly control)."
* ---------------------
* ------------------ | ------------
* | ADC |-----------------| | ADC CORE |
* | (Frontend/IIO) | Serial Data (eg | |(backend) |-------
* | |-----------------| ------------
* ------------------ ---------------------
The MDF (or DFSDM) use case, follows this topology:
- The SD modulator (ADC core) registers in backend framework
- The MDF registers in IIO framework and exposes the IIO devices
It also get configuration (ref voltage) from SD modulator, to compute
scaling.
I agree that if we consider the terms frontend and backend, the elements in
the data flow do not have the roles that we would naturally expect. However,
if we consider the expected role of the elements using the iio-backend
framework, the usage seems coherent to me.
I didn't even get as far as sd modulators or whatever, if I understand
correctly the ADC inputs on this device are fed by the onboard ADC?
(https://lore.kernel.org/linux-iio/20261006-adc-stm32mp25-v1-v4-0-d31ec75aecf3@xxxxxxxxxxx/)
In that case, I can't really see how it makes sense for the primary iio
device to change when data is fed back through the mdf or taken
directly from the ADC itself, particularly given how that would affect
the userspace interface.
The "serial" side of this seems in a similar vein to the adi,axi-adc
stuff, which when considered with the ADC inputs, really does give me
the impression this is backwards.
Some clarifications about the STM32MP25. This SoC does indeed provide ADCs, and these can be connected to the MDF via a dedicated interface. (but not the serial interface).
However, this use case is not supported by the driver. Only sigma-delta modulators, external to the SoC and connected via the serial interface, are supported. On ST boards, the only available SD modulators are digital microphones.
Anyway, if the internal ADC to MDF use case was supported, the issue would be the same. The whole ADC + MDF set would be presented at the interface as an aggregated device, and the ADC data would not be directly accessible to the user.
BRs
Olivier