[PATCH v4 04/18] dt-bindings: PCI: rcar-gen4: Add optional "aer" interrupt for R-Car Gen4 SoCs

From: Koichiro Den

Date: Wed Oct 14 2026 - 23:31:41 EST


The intreq_pcim_lperr interrupt carries Root Port AER notifications,
separately from the integrated MSI receiver interrupt. Describe it with
the "aer" name so the controller driver can use it for Root Port error
reporting.

Keep the fifth interrupt optional on R-Car Gen4 SoCs so existing device
trees remain valid. Extend the example accordingly.

Signed-off-by: Koichiro Den <den@xxxxxxxxxxxxx>
---
Changes since v3:
- Rebase on Marek's Gen5 AER binding fix:
https://lore.kernel.org/r/20261003215710.792518-1-marek.vasut+renesas@xxxxxxxxxxx/
This requires "aer" for the Gen5 SoC PCIe4 controller from the
beginning. Update the subject to clarify that it is optional only
on Gen4 SoCs, for compatibility with existing DTs.
- Drop R-b tags due to the changes.

v3: https://lore.kernel.org/r/20261006084638.3821710-5-den@xxxxxxxxxxxxx/

.../devicetree/bindings/pci/rcar-gen4-pci-host.yaml | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml b/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml
index 083b77d4de8f..a86c06701fa9 100644
--- a/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml
+++ b/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml
@@ -26,7 +26,8 @@ properties:
- const: renesas,rcar-gen5-pcie4 # R-Car Gen5 PCIe4

interrupts:
- maxItems: 4
+ minItems: 4
+ maxItems: 5

clocks:
maxItems: 2
@@ -93,11 +94,13 @@ allOf:
- const: config

interrupt-names:
+ minItems: 4
items:
- const: msi
- const: dma
- const: sft_ce
- const: app
+ - const: aer
- if:
properties:
compatible:
@@ -117,6 +120,9 @@ allOf:
- const: app
- const: config

+ interrupts:
+ maxItems: 4
+
interrupt-names:
items:
- const: msi
@@ -146,8 +152,9 @@ examples:
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi", "dma", "sft_ce", "app";
+ <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi", "dma", "sft_ce", "app", "aer";
clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>;
clock-names = "core", "ref";
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
--
2.54.0