Re: [PATCH v2 5/9] serial: qcom-geni: Use geni_se_set_rate() for source clock configuration
From: Mukesh Savaliya
Date: Thu Oct 15 2026 - 01:14:19 EST
On 8/27/2026 11:29 PM, Praveen Talari wrote:
On the SA8255P platform there is no Linux clock handler for the SEReviewed-by: Mukesh Kumar Savaliya <mukesh.savaliya@xxxxxxxxxxxxxxxx>
source clock, so the driver has no way to compute the divider needed
for a requested baud rate. To work around this, firmware instead
exposes the SE HW supported source clock frequencies as OPPs on the
perf domain device.
geni_se_domain_attach() now populates clk_perf_tbl from
the performance-domain OPP table, allowing firmware-managed
platforms to use geni_se_clk_freq_match().
Call geni_serial_set_rate() unconditionally from
qcom_geni_serial_set_termios(), and use geni_se_set_rate() instead of
dev_pm_opp_set_rate() so clock programming is handled centrally by
the GENI core, independent of the underlying clock-control mechanism.
Signed-off-by: Praveen Talari <praveen.talari@xxxxxxxxxxxxxxxx>
---