Re: [PATCH 03/10] dt-bindings: iio: frequency: add adi,ad9910-axi-backend

[Conor Dooley]

On Thu, Oct 15, 2026 at 01:49:43PM -0300, Rodrigo Alencar via B4 Relay wrote:
> From: Rodrigo Alencar <rodrigo.alencar@xxxxxxxxxx>
> 
> Add bindings for the AD9910 AXI backend IP core. The FPGA IP core
> interfaces with the data and control pins of the AD9910 DDS, streaming
> data from memory via DMA into the 18-bit parallel data port (F[1:0] and
> D[15:0] pins), which is clocked by the PDCLK output of the device. It
> also drives the PROFILE[2:0] pins and the DRCTL pin, which controls the
> slope direction of the digital ramp generator (DRG). The DRCTL pin is
> driven by a PWM generator, so the IP core is described both as an IIO
> backend and as a PWM provider.
> 
> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@xxxxxxxxxx>
> ---
>  .../iio/frequency/adi,ad9910-axi-backend.yaml      | 74 ++++++++++++++++++++++
>  MAINTAINERS                                        |  1 +
>  2 files changed, 75 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,ad9910-axi-backend.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,ad9910-axi-backend.yaml
> new file mode 100644
> index 000000000000..20b884e8eb10
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/frequency/adi,ad9910-axi-backend.yaml
> @@ -0,0 +1,74 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/frequency/adi,ad9910-axi-backend.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Analog Devices AD9910 AXI Backend IP core
> +
> +maintainers:
> +  - Rodrigo Alencar <rodrigo.alencar@xxxxxxxxxx>
> +
> +description:
> +  FPGA IP core that interfaces with the data and control pins of the AD9910
> +  Direct Digital Synthesizer. The SPI bus is used as the control interface
> +  of the AD9910 device, while this IP core streams data from memory via DMA
> +  into the 18-bit parallel data port (F[1:0] and D[15:0] pins), which is
> +  clocked by the PDCLK output of the AD9910. The IP core also drives the
> +  PROFILE[2:0] pins for profile selection and provides a PWM generator that
> +  drives the DRCTL pin, controlling the digital ramp generator (DRG) slope
> +  direction.
> +
> +  https://www.analog.com/en/products/ad9910.html

Should this link not point to the docs for the backend device?

Otherwise, this is pretty fine I think..

Conor.

> +
> +properties:
> +  compatible:
> +    const: adi,ad9910-axi-backend
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +    description: AXI bus clock (s_axi_aclk).
> +
> +  dmas:
> +    maxItems: 1
> +
> +  dma-names:
> +    items:
> +      - const: tx
> +
> +  '#io-backend-cells':
> +    const: 0
> +
> +  '#pwm-cells':
> +    const: 3
> +    description:
> +      The first cell must be 0, as only the DRCTL PWM output is available.
> +      The second cell is the PWM period in nanoseconds and the third cell
> +      holds the PWM flags.
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - dmas
> +  - dma-names
> +  - '#io-backend-cells'
> +  - '#pwm-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    ad9910_backend: dds-backend@44a00000 {
> +        compatible = "adi,ad9910-axi-backend";
> +        reg = <0x44a00000 0x10000>;
> +        clocks = <&clkc 15>;
> +        dmas = <&tx_dma 0>;
> +        dma-names = "tx";
> +        #io-backend-cells = <0>;
> +        #pwm-cells = <3>;
> +    };
> +...
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 3a2dfd1a4fd8..93ad6a829cb3 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1731,6 +1731,7 @@ S:	Supported
>  W:	https://ez.analog.com/linux-software-drivers
>  F:	Documentation/ABI/testing/debugfs-iio-ad9910
>  F:	Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9910
> +F:	Documentation/devicetree/bindings/iio/frequency/adi,ad9910-axi-backend.yaml
>  F:	Documentation/devicetree/bindings/iio/frequency/adi,ad9910.yaml
>  F:	Documentation/iio/ad9910.rst
>  F:	drivers/iio/frequency/ad9910.c
> 
> -- 
> 2.43.0
> 
>

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