RE: [PATCH v2 4/4] coco/tdx-host: Initialize trusted DMA on all capable IOMMUs

[Tian, Kevin]

+Aneesh.

> From: Baolu Lu <baolu.lu@xxxxxxxxxxxxxxx>
> Sent: Friday, October 16, 2026 3:03 PM
> 
> On 10/16/2026 1:37 AM, Jason Gunthorpe wrote:
> > On Thu, Oct 15, 2026 at 04:31:31PM +0800, Xu Yilun wrote:
> >
> >> An alternative could be, bringing up one IOMMU when an associated
> >> device requests link encryption. Then a no-tdx-support iommu fails the
> >> encryption request naturally.
> > That is what ARM is planning to do. I think it is reasonable to
> > trigger creation of the secure iommu when the TSM is connected to TDX.
> >
> > Fail connect if the iommu could not be created.
> 
> Yes, agreed. The Intel iommu driver could use per-device interfaces,
> just as ARM is planning. There are some differences, though.
> 
> ARM's interaction with the iommu driver in viommu_init() appears to
> consist of two steps:
> 
>   - arm_smmu_get_realm_params(dev, &params): get and validate the
>     physical iommu information from the arm-smmu-v3 driver;
>   - cca_psmmu_get(&params): activate the physical smmu for Realm use.
> 
> Intel differs in two ways:
> 
>   - ARM queries the physical iommu information from the iommu driver
>     in the viommu_init() path. On Intel, the secure iommu must be set
>     up during TSM connect, because it is part of establishing PCIe
>     link encryption.

My understanding is that the psmmu is required for link encryption, so
it's similar ordering here i.e. activated before tsm connect?

> 
>   - The TDX Connect architecture places requirements on the host
>     iommu driver while the secure IOMMU is being set up. For example,
>     the host iommu driver must block the enhanced command (ECMD)
>     interface while the TDH.IOMMU.SETUP SEAMCALL runs, and it must
>     reserve the upper half of the domain ID space. These steps have
>     to happen atomically under the iommu driver's own locks. As a
>     result, the Intel iommu driver needs to merge the two steps above
>     into one.

Didn't get this. Both ECMD and DID reservation are TDX specific things.
How are they related to the two steps in the ARM sides and why calls
for merging?

and why are they must be done atomically? they are conditions to
execute TDH.IOMMU.SETUP, but it is perfectly fine to reserve DID
at an early point then block ECMD later...

> 
> So the Intel iommu driver will probably end up with interfaces like:
> 
>   - dmar_tdxcs_iommu_init(struct device *dev, ...);
>   - dmar_tdxcs_iommu_release(struct device *dev, ...);
> 
> These would be called from the connect and disconnect callbacks of
> the TDX link ops:
> 
> static struct pci_tsm_ops tdx_tsm_link_ops = {
>          .owner = THIS_MODULE,
>          .probe = tdx_tsm_link_probe,
>          .remove = tdx_tsm_link_remove,
>          .connect = tdx_tsm_link_connect,
>          .disconnect = tdx_tsm_link_disconnect,
> ...
> };
> 
> Any thoughts?
> 
> Thanks,
> baolu