Re: [PATCH 2/2] arm64: dts: qcom: sm8350: Add CPU OPP tables with memory bandwidth

[Konrad Dybcio]

On 10/16/26 8:01 AM, Demeter Barna via B4 Relay wrote:
> From: Demeter Barna <me@xxxxxxxxxxxxxxxxxxx>
> 
> Without them nothing votes for the CPUs' memory paths and DDR stays at
> what other clients request. Vote for CPU-to-LLCC, LLCC-to-DDR and L3
> with the CPU frequency, as on SM8550 and SM8650.
> 
> The frequencies are the cpufreq-hw LUT; the LLCC, DDR (LPDDR5) and L3
> levels follow the downstream memory latency tables.
> 
> Assisted-by: LLM
> Signed-off-by: Demeter Barna <me@xxxxxxxxxxxxxxxxxxx>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>

Konrad