Re: [PATCH net-next v14 02/12] dt-bindings: dpll: add SiTime SiT95316 clock generator

From: Rob Herring (Arm)

Date: Fri Oct 16 2026 - 09:53:28 EST



On Fri, 16 Oct 2026 00:58:25 +0000, Ali Rouhi wrote:
> Add a binding for the SiTime SiT9531x family of clock generators: an
> I2C-controlled device with four independent PLLs, up to eight input
> clocks and up to twelve outputs, described as a DPLL provider.
>
> The XO is given either as a clock or, for firmware that describes the
> oscillator as a property rather than as a clock provider, such as ACPI,
> as clock-frequency.
>
> The supplies are described by their pin names: the core and input rails,
> the GPIO rail the SiT95317 has, and one per output-driver pin -- VDDO0 to
> VDDO7 on the SiT95317, VDDO0_1, VDDO2 to VDDO9 and VDDO10_11 on the
> SiT95316. The driver does not enable them, since the boards so far
> power the part permanently; describing them gives a board with
> switchable rails a way to say so.
>
> Signed-off-by: Ali Rouhi <arouhi@xxxxxxxxxx>
> ---
> .../bindings/dpll/sitime,sit95316.yaml | 214 ++++++++++++++++++
> MAINTAINERS | 6 +
> 2 files changed, 220 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dpll/sitime,sit95316.yaml
>

Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>