Re: [PATCH 26/38] arm: dts: qcom: msm8226: Align multiple property data

[Waqar Hameed]

On Mon, Oct 12, 2026 at 17:31 +0200 Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx> wrote:

> On 10/2/26 12:36 AM, Waqar Hameed wrote:
>> Multiple property data on a newline should be aligned with the first
>> one. Found/fixed with dtfmt (Devicetree Source formatter).
>> 
>> Signed-off-by: Waqar Hameed <waqar.hameed@xxxxxxxx>
>> ---
>>  arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 8 ++++----
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>> 
>> diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
>> index 346aef4a1d9f5..ac18744b50924 100644
>> --- a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
>> +++ b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
>> @@ -1483,12 +1483,12 @@ cpu_crit1: trip1 {
>>  	timer {
>>  		compatible = "arm,armv7-timer";
>>  		interrupts = <GIC_PPI 2
>> -				(GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
>> +			      (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
>>  			     <GIC_PPI 3
>> -				(GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
>> +			      (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
>>  			     <GIC_PPI 4
>> -				(GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
>> +			      (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
>>  			     <GIC_PPI 1
>> -				(GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>;
>> +			      (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>;
>>  	};
>
> Likewise, these fit into 100c

Yup, will change if we come to a conclusion (c.f. response in patch 19
and 22).